Users Manual

R01UH0823EJ0110 Rev.1.10 Page 1223 of 1852
Nov 30, 2020
RX23W Group 36. CAN Module (RSCAN)
36.2.22 Receive Rule Entry Register jCL (GAFLPLj) (j = 0 to 15)
Modify the GAFLPLj register only when the GRWCR.RPAGE bit is set to 0 in global reset mode.
GAFLFDP0 Bit (Receive FIFO Buffer Select 0),
GAFLFDP1 Bit (Receive FIFO Buffer Select 1),
GAFLFDP4 Bit (RSCAN0 Transmit/Receive FIFO Buffer Select 0)
These bits are used to specify FIFO buffers that store receive messages that have passed through the filter. Up to two
FIFO buffers are selectable. However, when the GAFLPLj.GAFLRMV bit is set to 1 (a receive buffer is used), up to one
FIFO buffer is selectable. Only receive FIFO buffers and the transmit/receive FIFO buffer for which the
CFCCH0.CFM[1:0] bits are set to 00b (receive mode) are selectable.
GAFLRMDP[6:0] Bits (Receive Buffer Number Select)
These bits are used to select the number of the receive buffer that stores receive messages that have passed through the
filter when the GAFLRMV bit is set to 1. Set these bits to a value smaller than the value set by the RMNB.NRXMB[4:0]
bits.
GAFLRMV Bit (Receive Buffer Enable)
When this bit is set to 1, receive messages that have passed through the filter are stored in the receive buffer selected by
the GAFLRMDP[6:0] bits.
Address(es): RSCAN.GAFLPL0 000A 83A8h, RSCAN.GAFLPL1 000A 83B4h, RSCAN.GAFLPL2 000A 83C0h,
RSCAN.GAFLPL3 000A 83CCh, RSCAN.GAFLPL4 000A 83D8h, RSCAN.GAFLPL5 000A 83E4h,
RSCAN.GAFLPL6 000A 83F0h, RSCAN.GAFLPL7 000A 83FCh, RSCAN.GAFLPL8 000A 8408h,
RSCAN.GAFLPL9 000A 8414h, RSCAN.GAFLPL10 000A 8420h, RSCAN.GAFLPL11 000A 842Ch,
RSCAN.GAFLPL12 000A 8438h, RSCAN.GAFLPL13 000A 8444h, RSCAN.GAFLPL14 000A 8450h,
RSCAN.GAFLPL15 000A 845Ch
b15b14b13b12b11b10b9b8b7b6b5b4b3b2b1b0
GAFLR
MV
GAFLRMDP[6:0] — — —
GAFLF
DP4
——
GAFLF
DP1
GAFLF
DP0
Value after reset:
0000000000000000
Bit Symbol Bit Name Description R/W
b0 GAFLFDP0 Receive FIFO Buffer Select 0 0: Not select a receive FIFO buffer 0
1: Select a receive FIFO buffer 0
R/W
b1 GAFLFDP1 Receive FIFO Buffer Select 1 0: Not select a receive FIFO buffer 1
1: Select a receive FIFO buffer 1
R/W
b3, b2 — Reserved These bits are read as 0. The write value should be 0. R/W
b4 GAFLFDP4 RSCAN0 Transmit/Receive
FIFO Buffer Select 0
0: Not select an RSCAN0 transmit/receive FIFO buffer 0
1: Select an RSCAN0 transmit/receive FIFO buffer 0
R/W
b7 to b5 — Reserved These bits are read as 0. The write value should be 0. R/W
b14 to b8 GAFLRMDP[6:0] Receive Buffer Number Select Set the receive buffer number to store receive messages. R/W
b15 GAFLRMV Receive Buffer Enable 0: No receive buffer is used.
1: A receive buffer is used.
R/W