User's Manual

GMH Series VHF Radio General Information
BK RADIO Page 4-3
Prescaler - The prescaler U602 is the first divider in the feedback path of the synthesizer. It divides the RF
signal to a frequency which can be processed by the following CMOS dividers. The prescaler is a dual
modulus type which allows the division ratio to be set by the synthesizer to either divide-by-128 (modulus
control line high) or divide-by-129 (modulus control line low). This capability allows the channel spacing to
be determined by the divided down reference frequency and not a multiple thereof.
Reference Oscillator - The Reference Oscillator provides the frequency reference from which the receiver
and transmitter injection signals are synthesized. The oscillator frequency is controlled by the crystal Y601
which operates in the parallel resonant mode. The core microprocessor uses temperature sensor U607 to
measure the temperature of the crystal and changes the bias on varactor CR602 accordingly, to
compensate the crystal to less than ±2.5 ppm tolerance. The varactor provides a means for modulating
the reference oscillator to improve the synthesizer frequency response for low frequency modulation.
Loop Filter - The Loop Filter removes noise and unwanted frequency components from the output of the
sample-and-hold phase detector which otherwise would modulate the VCO. In addition, it employs a
multiple filter bandwidth design which allows fast response during frequency changes (such as in channel
scan) without degrading the noise and spurious performance of the receiver during steady state receive
and transmit conditions. The filter bandwidth is switched to a wide condition when the LATCH line pulses
high for approximately 6 msec during a frequency change. This allows the new frequency to be reached
quickly. When the LATCH line to returns to a low state, the filter bandwidth changes to a narrow condition
and provides for good noise and spurious performance. Different filter bandwidths are used for transmit
and receive to provide better hum and noise performance in transmit and faster response time in receive.
This is accomplished by changing the filter bandwidth to a narrower value when the RX/-TX line goes low
during transmit.
Offset D/A – U603 and associated resistors form a serial latching D/A which is loaded by the
microprocessor when it loads the synthesizer IC. This provides an offset voltage which is summed into the
loop filter op amp U605 to shift up the 0 to 4 volt output of the phase detector. Calibration of the VCO is
provided for in the software by altering the loaded values of this IC.
Deviation Compensation – U508 is a digital pot used to control the amplitude of the transmit modulation
signal. As the transmit frequency increases, less voltage is needed at the VCO, so the modulation signal is
attenuated.
4.3.1.4 Squelch Detection
U505 and associated circuitry form a bandpass filter that selects and amplifies the noise on the
discriminator output near 20 kHz. The core microprocessor samples the output of the filter, averages a
number of samples, and compares the result to a threshold number to determine if carrier is present.
4.3.1.5 CTCSS/CDCSS Decode
U506 and associated circuitry act as a filter and limiter for CTCSS/CDCSS decoding interface to the core
microprocessor.
4.3.1.6 Power Control
The core microprocessor controls the output power of the transmitter by setting the reference voltage of a
feedback control loop. U509 and associated circuitry integrate the difference between the reference
voltage and the forward detected voltage from the directional coupler, and drives the amplifier/driver Q507.
Q507 supplies bias to the low level transmitter driver stage collector.