User guide

Redpine Signals, Inc. Proprietary and Confidential. Page 11
R
R
S
S
9
9
1
1
1
1
0
0
-
-
N
N
-
-
1
1
1
1
-
-
2
2
2
2
/
/
2
2
4
4
/
/
2
2
8
8
S
S
o
o
f
f
t
t
w
w
a
a
r
r
e
e
P
P
r
r
o
o
g
g
r
r
a
a
m
m
m
m
i
i
n
n
g
g
R
R
e
e
f
f
e
e
r
r
e
e
n
n
c
c
e
e
M
M
a
a
n
n
u
u
a
a
l
l
V
V
e
e
r
r
s
s
i
i
o
o
n
n
4
4
.
.
1
1
5
5
2 Architecture Overview
The architecture of the RS9110-N-11-2X module is shown below.
SLIP
UART
HOST PROCESSOR (HOST)
RS9110-N-11-2X
Host Abstraction Layer
Station Managment Entity
802.11 b/g/n MAC
TCP/IP
Wireless Control Block
SPI
WPA/WPA-2
UART Driver
Thin
SPI Driver
UARTSPI
Application
Interrupt
Figure 1:RS9110-N-11-2X Software Architecture Block Diagram
The RS9110-N-11-2X module is integrated with the Host using either UART or
SPI interfaces. The transmission and reception of the data to/from the Host
depends on the interface used to connect the module as briefed below.