Datasheet

06 February 2012 Broadcom Europe Ltd. 406 Science Park Milton Road Cambridge CB4 0WW Page 95
© 2012 Broadcom Corporation. All rights reserved
Table 6-7 – GPIO Alternate function select register 5
GPIO Pin Output Set Registers (GPSETn)
S
YNOPSIS
The output set registers are used to set a GPIO pin. The SET{n} field defines the
respective GPIO pin to set, writing a “0” to the field has no effect. If the GPIO pin is
being used as in input (by default) then the value in the SET{n} field is ignored.
However, if the pin is subsequently defined as an output then the bit will be set
according to the last set/clear operation. Separating the set and clear functions
removes the need for read-modify-write operations
Bit(s) Field Name Description Type Reset
31-0 SETn (n=0..31)
0 = No effect
1 = Set GPIO pin n
R/W 0
Table 6-8 – GPIO Output Set Register 0
Bit(s) Field Name Description Type Reset
31-22 -
Reserved
R 0
21-0 SETn
(n=32..53)
0 = No effect
1 = Set GPIO pin n.
R/W 0
Table 6-9 – GPIO Output Set Register 1
GPIO Pin Output Clear Registers (GPCLRn)
S
YNOPSIS
The output clear registers) are used to clear a GPIO pin. The CLR{n} field defines
the respective GPIO pin to clear, writing a “0” to the field has no effect. If the GPIO
pin is being used as in input (by default) then the value in the CLR{n} field is
ignored. However, if the pin is subsequently defined as an output then the bit will
be set according to the last set/clear operation. Separating the set and clear
functions removes the need for read-modify-write operations.
Bit(s) Field Name Description Type Reset
31-0 CLRn (n=0..31)
0 = No effect
1 = Clear GPIO pin n
R/W 0
Table 6-10 – GPIO Output Clear Register 0
Bit(s) Field Name Description Type Reset
31-22 -
Reserved
R 0