Datasheet

06 February 2012 Broadcom Europe Ltd. 406 Science Park Milton Road Cambridge CB4 0WW Page 81
© 2012 Broadcom Corporation. All rights reserved
4 WRITE_RDY Create interrupt if data can be written to DATA
register:
0 = no
1 = yes
RW 0x0
3
Reserved
-
Write as 0, read as don't care
2 BLOCK_GAP Create interrupt if data transfer has stopped at
block gap:
0 = no
1 = yes
RW 0x0
1 DATA_DONE Create interrupt if data transfer has finished:
0 = no
1 = yes
RW 0x0
0 CMD_DONE Create interrupt if command has finished:
0 = no
1 = yes
RW 0x0
CONTROL2 Register
Synopsis
This register is used to enable the different interrupts in the INTERRUPT register to
generate an interrupt on the int_to_arm output.
For the exact details please refer to the Arasan documentation
SD3.0_Host_AHB_eMMC4.4_Usersguide_ver5.9_jan11_10.pdf. Bits marked as
reserved in this document but not by the Arasan documentation refer to functionality
which has been disabled due to the changes listed in the previous chapter.
Bit
(s)
Field Name
Description
Type
Reset
31:24
Reserved
-
Write as 0, read as don't care
23 TUNED Tuned clock is used for sampling data:
0 = no
1 = yes
RW 0x0
22 TUNEON Start tuning the SD clock:
0 = not tuned or tuning complete
1 = tuning
RW 0x0
21:19
Reserved
-
Write as 0, read as don't care