Datasheet

06 February 2012 Broadcom Europe Ltd. 406 Science Park Milton Road Cambridge CB4 0WW Page 8
© 2012 Broadcom Corporation. All rights reserved
2 Auxiliaries: UART1 & SPI1, SPI2
2.1 Overview
The Device has three Auxiliary peripherals: One mini UART and two SPI masters. These
three peripheral are grouped together as they share the same area in the peripheral register
map and they share a common interrupt. Also all three are controlled by the auxiliary enable
register.
Auxiliary peripherals Register Map
(offset = 0x7E21 5000)
Address Register Name
3
Description Size
0x7E21 5000 AUX_IRQ Auxiliary Interrupt status 3
0x7E21 5004 AUX_ENABLES Auxiliary enables 3
0x7E21 5040 AUX_MU_IO_REG Mini Uart I/O Data 8
0x7E21 5044 AUX_MU_IER_REG Mini Uart Interrupt Enable 8
0x7E21 5048 AUX_MU_IIR_REG Mini Uart Interrupt Identify 8
0x7E21 504C AUX_MU_LCR_REG Mini Uart Line Control 8
0x7E21 5050 AUX_MU_MCR_REG Mini Uart Modem Control 8
0x7E21 5054 AUX_MU_LSR_REG Mini Uart Line Status 8
0x7E21 5058 AUX_MU_MSR_REG Mini Uart Modem Status 8
0x7E21 505C AUX_MU_SCRATCH Mini Uart Scratch 8
0x7E21 5060 AUX_MU_CNTL_REG Mini Uart Extra Control 8
0x7E21 5064 AUX_MU_STAT_REG Mini Uart Extra Status 32
0x7E21 5068 AUX_MU_BAUD_REG Mini Uart Baudrate 16
0x7E21 5080 AUX_SPI0_CNTL0_REG SPI 1 Control register 0 32
0x7E21 5084 AUX_SPI0_CNTL1_REG SPI 1 Control register 1 8
0x7E21 5088 AUX_SPI0_STAT_REG SPI 1 Status 32
0x7E21 5090 AUX_SPI0_IO_REG SPI 1 Data 32
0x7E21 5094 AUX_SPI0_PEEK_REG SPI 1 Peek 16
0x7E21 50C0 AUX_SPI1_CNTL0_REG SPI 2 Control register 0 32
0x7E21 50C4 AUX_SPI1_CNTL1_REG SPI 2 Control register 1 8
3
These register names are identical to the defines in the AUX_IO header file. For programming purposes these
names should be used wherever possible.