Datasheet

06 February 2012 Broadcom Europe Ltd. 406 Science Park Milton Road Cambridge CB4 0WW Page 62
© 2012 Broadcom Corporation. All rights reserved
8
BSC/SPI Slave TX
9
BSC/SPI Slave RX
10
unused
11
e.MMC
12
UART TX
13
SD HOST
14
UART RX.
15
DSI
16
SLIMBUS MCTX.
17
HDMI
18
SLIMBUS MCRX
19
SLIMBUS DC0
20
SLIMBUS DC1
21
SLIMBUS DC2
22
SLIMBUS DC3
23
SLIMBUS DC4
24
Scaler FIFO 0 & SMI *
25
Scaler FIFO 1 & SMI *
26
Scaler FIFO 2 & SMI *
27
SLIMBUS DC5
28
SLIMBUS DC6
29
SLIMBUS DC7
30
SLIMBUS DC8
31
SLIMBUS DC9
* The SMI element of the Scaler FIFO 0 & SMI DREQs can be disabled by setting the
SMI_DISABLE bit in the DMA_DREQ_CONTROL register in the system arbiter control
block.