Datasheet

06 February 2012 Broadcom Europe Ltd. 406 Science Park Milton Road Cambridge CB4 0WW Page 33
© 2012 Broadcom Corporation. All rights reserved
15:0 DLEN Data Length.
Writing to DLEN specifies the number of bytes to
be transmitted/received. Reading from DLEN
when TA = 1 or DONE = 1, returns the number
of bytes still to be transmitted or received.
Reading from DLEN when TA = 0 and DONE =
0, returns the last DLEN value written. DLEN can
be left over multiple packets.
RW 0x0
A Register
Synopsis
The slave address register specifies the slave address and cycle type. The address
register can be left across multiple transfers
The ADDR field specifies the slave address of the I2C device.
Bit(s)
Field Name
Description
Type
Reset
31:7
Reserved
-
Write as 0, read as don't care
6:0 ADDR Slave Address. RW 0x0
FIFO Register
Synopsis
The Data FIFO register is used to access the FIFO. Write cycles to this address place
data in the 16-byte FIFO, ready to transmit on the BSC bus. Read cycles access data
received from the bus.
Data writes to a full FIFO will be ignored and data reads from an empty FIFO will result
in invalid data. The FIFO can be cleared using the I2CC.CLEAR field.
The DATA field specifies the data to be transmitted or received.
Bit(s)
Field Name
Description
Type
Reset
31:8
Reserved
-
Write as 0, read as don't care
7:0 DATA Writes to the register write transmit data to the
FIFO. Reads from register reads received data
from the FIFO.
RW 0x0
DIV Register