Datasheet

06 February 2012 Broadcom Europe Ltd. 406 Science Park Milton Road Cambridge CB4 0WW Page 32
© 2012 Broadcom Corporation. All rights reserved
6 TXE TXE - FIFO Empty
0 = FIFO is not empty. 1 = FIFO is empty. If a
write is underway, no further serial data can be
transmitted until data is written to the FIFO.
RO 0x1
5 RXD RXD - FIFO contains Data
0 = FIFO is empty. 1 = FIFO contains at least 1
byte. Cleared by reading sufficient data from
FIFO.
RO 0x0
4 TXD TXD - FIFO can accept Data
0 = FIFO is full. The FIFO cannot accept more
data. 1 = FIFO has space for at least 1 byte.
RO 0x1
3 RXR RXR - FIFO needs Reading ( full)
0 = FIFO is less than full and a read is
underway. 1 = FIFO is or more full and a read is
underway. Cleared by reading sufficient data
from the FIFO.
RO 0x0
2 TXW TXW - FIFO needs Writing ( full)
0 = FIFO is at least full and a write is underway
(or sufficient data to send). 1 = FIFO is less then
full and a write is underway. Cleared by writing
sufficient data to the FIFO.
RO 0x0
1 DONE DONE Transfer Done
0 = Transfer not completed. 1 = Transfer
complete. Cleared by writing 1 to the field.
RW 0x0
0 TA TA Transfer Active
0 = Transfer not active. 1 = Transfer active.
RO 0x0
DLEN Register
Synopsis
The data length register defines the number of bytes of data to transmit or receive in
the I2C transfer. Reading the register gives the number of bytes remaining in the
current transfer.
The DLEN field specifies the number of bytes to be transmitted/received. Reading the
DLEN field when a transfer is in progress (TA = 1) returns the number of bytes still to
be transmitted or received. Reading the DLEN field when the transfer has just
completed (DONE = 1) returns zero as there are no more bytes to transmit or receive.
Finally, reading the DLEN field when TA = 0 and DONE = 0 returns the last value
written. The DLEN field can be left over multiple transfers.
Bit(s)
Field Name
Description
Type
Reset
31:16
Reserved
-
Write as 0, read as don't care