Datasheet

06 February 2012 Broadcom Europe Ltd. 406 Science Park Milton Road Cambridge CB4 0WW Page 31
© 2012 Broadcom Corporation. All rights reserved
Synopsis
The status register is used to record activity status, errors and interrupt requests.
The TA field indicates the activity status of the BSC controller. This read-only field
returns a 1 when the controller is in the middle of a transfer and a 0 when idle.
The DONE field is set when the transfer completes. The DONE condition can be used
with I2CC.INTD to generate an interrupt on transfer completion. The DONE field is
reset by writing a 1 , writing a 0 to the field has no effect.
The read-only TXW bit is set during a write transfer and the FIFO is less than full and
needs writing. Writing sufficient data (i.e. enough data to either fill the FIFO more than
full or complete the transfer) to the FIFO will clear the field. When the I2CC.INTT
control bit is set, the TXW condition can be used to generate an interrupt to write more
data to the FIFO to complete the current transfer. If the I2C controller runs out of data
to send, it will wait for more data to be written into the FIFO.
The read-only RXR field is set during a read transfer and the FIFO is or more full and
needs reading. Reading sufficient data to bring the depth below will clear the field.
When I2CC.INTR control bit is set, the RXR condition can be used to generate an
interrupt to read data from the FIFO before it becomes full. In the event that the FIFO
does become full, all I2C operations will stall until data is removed from the FIFO.
The read-only TXD field is set when the FIFO has space for at least one byte of data.
TXD is clear when the FIFO is full. The TXD field can be used to check that the FIFO
can accept data before any is written. Any writes to a full TX FIFO will be ignored.
The read-only RXD field is set when the FIFO contains at least one byte of data. RXD
is cleared when the FIFO becomes empty. The RXD field can be used to check that
the FIFO contains data before reading. Reading from an empty FIFO will return invalid
data.
The read-only TXE field is set when the FIFO is empty. No further data will be
transmitted until more data is written to the FIFO.
The read-only RXF field is set when the FIFO is full. No more clocks will be generated
until space is available in the FIFO to receive more data.
The ERR field is set when the slave fails to acknowledge either its address or a data
byte written to it. The ERR field is reset by writing a 1 , writing a 0 to the field has no
effect.
The CLKT field is set when the slave holds the SCL signal high for too long (clock
stretching). The CLKT field is reset by writing a 1 , writing a 0 to the field has no effect.
Bit(s)
Field Name
Description
Type
Reset
31:10
Reserved
-
Write as 0, read as don't care
9 CLKT CLKT Clock Stretch Timeout
0 = No errors detected. 1 = Slave has held the
SCL signal low (clock stretching) for longer and
that specified in the I2CCLKT register Cleared
by writing 1 to the field.
RW 0x0
8 ERR ERR ACK Error
0 = No errors detected. 1 = Slave has not
acknowledged its address. Cleared by writing 1
to the field.
RW 0x0
7 RXF RXF - FIFO Full
0 = FIFO is not full. 1 = FIFO is full. If a read is
underway, no further serial data will be received
until data is read from FIFO.
RO 0x0