Datasheet

06 February 2012 Broadcom Europe Ltd. 406 Science Park Milton Road Cambridge CB4 0WW Page 195
© 2012 Broadcom Corporation. All rights reserved
8 ITOP8 Intra-chip output. Writes specify the value
to be driven on UARTRTINTR.
Reads return the value of UARTRTINTR at
the output of the test multiplexor.
RW 0x0
7 ITOP7 Intra-chip output. Writes specify the value
to be driven on UARTEINTR.
Reads return the value of UARTEINTR at
the output of the test multiplexor.
RW 0x0
6 ITIP6 Intra-chip output. Writes specify the value
to be driven on UARTINTR.
Reads return the value of UARTINTR at the
output of the test multiplexor.
RW 0x0
5:4
Reserved
-
Write as 0, read as don't care
3 ITIP3 Primary output. Writes specify the value to
be driven on nUARTRTS.
RW 0x0
2:1
Reserved
-
Write as 0, read as don't care
0 ITIP0 Primary output. Writes specify the value to
be driven on UARTTXD.
RW 0x0
TDR Register
Synopsis
UART_TDR is the test data register. It enables data to be written into the
receive FIFO and read out from the transmit FIFO for test purposes. This test
function is enabled by the ITCR1bit in the Test Control Register, UART_ITCR.
Bit(s)
Field Name
Description
Type
Reset
31:11
Reserved
-
Write as 0, read as don't care
10:0 TDR10_0 When the ITCR1 bit is set to 1, data is
written into the receive FIFO and read out
of the transmit FIFO.
RW 0x0