Datasheet
06 February 2012 Broadcom Europe Ltd. 406 Science Park Milton Road Cambridge CB4 0WW Page 175
© 2012 Broadcom Corporation. All rights reserved
13 UART
The BCM2835 device has two UARTS. On mini UART and and PL011 UART. This section
describes the PL011 UART. For details of the mini UART see 2.2 Mini UART.
The PL011 UART is a Universal Asynchronous Receiver/Transmitter. This is the ARM
UART (PL011) implementation. The UART performs serial-to-parallel conversion on data
characters received from an external peripheral device or modem, and parallel-to-serial
conversion on data characters received from the Advanced Peripheral Bus (APB).
The ARM PL011 UART has some optional functionality which can be included or left out.
The following functionality is not supported :
● Infrared Data Association (IrDA)
● Serial InfraRed (SIR) protocol Encoder/Decoder (ENDEC)
● Direct Memory Access (DMA).
The UART provides:
• Separate 16x8 transmit and 16x12 receive FIFO memory.
• Programmable baud rate generator.
• Standard asynchronous communication bits (start, stop and parity). These are added
prior to transmission and removed on reception.
• False start bit detection.
• Line break generation and detection.
• Support of the modem control functions CTS and RTS. However DCD, DSR, DTR,
and RI are not supported.
• Programmable hardware flow control.
• Fully-programmable serial interface characteristics:
data can be 5, 6, 7, or 8 bits
even, odd, stick, or no-parity bit generation and detection
1 or 2 stop bit generation
baud rate generation, dc up to UARTCLK/16
The UART clock source and associated dividers are controlled by the Clock Manager.
For the in-depth UART overview, please, refer to the ARM PrimeCell UART (PL011)
Revision: r1p5 Technical Reference Manual.
13.1 Variations from the 16C650 UART
The UART varies from the industry-standard 16C650 UART device as follows:
• Receive FIFO trigger levels are 1/8, 1/4, 1/2, 3/4, and 7/8
• Transmit FIFO trigger levels are 1/8, 1/4, 1/2, 3/4, and 7/8
• The internal register map address space, and the bit function of each register differ