Datasheet

06 February 2012 Broadcom Europe Ltd. 406 Science Park Milton Road Cambridge CB4 0WW Page 160
© 2012 Broadcom Corporation. All rights reserved
11 SPI/BSC SLAVE
11.1 Introduction
The BSC interface can be used as either a Broadcom Serial Controller (BSC) or a Serial
Peripheral Interface (SPI) controller. The BSC bus is a proprietary bus compliant with the
Philips® I2C bus/interface version 2.1 January 2000. Both BSC and SPI controllers work in
the slave mode. The BSC slave controller has specially built in the Host Control and Software
Registers for a Chip booting. The BCS controller supports fast-mode (400Kb/s) and it is
compliant to the I
2
C bus specification version 2.1 January 2000 with the restrictions:
• I
2
C slave only operation
• clock stretching is not supported
• 7-bit addressing only
•
There is only one BSC/SPI slave. The registers base addresses is 0x7E21_4000.
11.2 Registers
The SPI controller implements 3 wire serial protocol variously called Serial Peripheral
Interface (SPI) or Synchronous Serial Protocol (SSP). BSC and SPI controllers do not have
DMA connected, hence DMA is not supported.
I2C_SPI_SLV Address Map
Address
Offset
Register Name Description Size
0x0
DR
Data Register 32
0x4
RSR
The operation status register and error clear register 32
0x8
SLV
The I2C SPI Address Register holds the I2C slave
address value
32
0xc
CR
The Control register is used to configure the I2C or SPI
operation
32
0x10
FR
Flag register 32
0x14
IFLS
Interrupt fifo level select register 32
0x18
IMSC
Interupt Mask Set Clear Register 32