Datasheet

06 February 2012 Broadcom Europe Ltd. 406 Science Park Milton Road Cambridge CB4 0WW Page 16
© 2012 Broadcom Corporation. All rights reserved
AUX_MU_SCRATCH Register (0x7E21 505C)
S
YNOPSIS The AUX_MU_SCRATCH is a single byte storage.
Bit(s) Field Name Description Type Reset
31:8
Reserved, write zero, read as don’t care
7:0 Scratch
One whole byte extra on top of the 134217728
provided by the SDC
R/W 0
AUX_MU_CNTL_REG Register (0x7E21 5060)
S
YNOPSIS The AUX_MU_CNTL_REG provides access to some extra useful and nice features not
found on a normal 16550 UART .
Bit(s) Field Name Description Type Reset
31:8
Reserved, write zero, read as don’t care
7
CTS assert
level
This bit allows one to invert the CTS auto flow
operation polarity.
If set the CTS auto flow assert level is low*
If clear the CTS auto flow assert level is high*
R/W 0
6
RTS assert
level
This bit allows one to invert the RTS auto flow
operation polarity.
If set the RTS auto flow assert level is low*
If clear the RTS auto flow assert level is high*
R/W 0
5:4
RTS AUTO
flow level
These two bits specify at what receiver FIFO level the
RTS line is de-asserted in auto-flow mode.
00 : De-assert RTS when the receive FIFO has 3
empty spaces left.
01 : De-assert RTS when the receive FIFO has 2
empty spaces left.
10 : De-assert RTS when the receive FIFO has 1
empty space left.
11 : De-assert RTS when the receive FIFO has 4
empty spaces left.
R/W 0
3
Enable
transmit Auto
flow-control
using CTS
If this bit is set the transmitter will stop if the CTS
line is de-asserted.
If this bit is clear the transmitter will ignore the status
of the CTS line
R/W 0