Datasheet

06 February 2012 Broadcom Europe Ltd. 406 Science Park Milton Road Cambridge CB4 0WW Page 129
© 2012 Broadcom Corporation. All rights reserved
1 RXON Enable reception.
0 = Disable reception. This will stop on the next
available frame end. RX FIFO data can still be
read.
1 = Enable reception. This will be start receiving
at the start of the next frame. The first channel to
be received will be the first word written to the
RX FIFO.
This bit can be written whilst the interface is
running.
RW 0x0
0 EN Enable the PCM Audio Interface
0 = The PCM interface is disabled and most
logic is gated off to save power.
1 = The PCM Interface is enabled.
This bit can be written whilst the interface is
running.
RW 0x0
FIFO_A Register
Synopsis
This is the FIFO port of the PCM. Data written here is transmitted, and received data is
read from here.
Bit(s)
Field Name
Description
Type
Reset
31:0
Reserved
-
Write as 0, read as don't care
MODE_A Register
Synopsis
This register defines the basic PCM Operating Mode. It is used to configure the frame
size and format and whether the PCM is in master or slave modes for its frame sync or
clock. This register cannot be changed whilst the PCM is running.
Bit(s)
Field Name
Description
Type
Reset
31:29
Reserved
-
Write as 0, read as don't care