Datasheet

06 February 2012 Broadcom Europe Ltd. 406 Science Park Milton Road Cambridge CB4 0WW Page 122

provided to help determine if channel slip has occurred. They indicate if the number of words

in the FIFO is a multiple of a full frame (taking into account where we are in the current

frame being transferred). This assumes that an integer number of frames data has been

sent/read from the FIFOs.

If a frame is programmed to have two data channels and the packed mode bits are set (FRXP

FTXP) then the FIFOs are configured so that each word contains the data for both channels

(2x 16 bit samples). In this mode each word written to the TX FIFO contains 2 16 bit

samples, and the Least Significant sample is transmitted first. Each word read from the RX

FIFO will contain the data received from 2 channels, the first channel received will be in the

Least Significant half of the word. If the channels size is less than 16 bits, the TX data will be

truncated and RX data will be padded to 16 bits with zeros.

Note that data is always serialised MS-bit first. This is well-established behaviour in both

PCM and I2S.

If the PDM input mode is enabled then channel 1 is sampled on the negative edge of

PCM_CLK whilst channel 2 is sampled on the positive edge of PCM_CLK.

PCM_CLK

PCM_FS

Clock 0

PCM_DIN

PCM_DOUT

Clock 1

Sampling

window

Clock 2

Figure 8-3 Timing at Start of Frame

Note that the precise timing of FS (when it is an input) is not clearly defined and it may

change state before or after the positive edge of the clock. Here the first clock of the frame is

defined as the clock period where the PCM_FS is sampled (negative edge) as a 1 where it

was previously sampled as a 0.

8.4 Software Operation

8.4.1 Operating in Polled mode

Set the EN bit to enable the PCM block. Set all operational values to define the frame and

channel settings. Assert RXCLR and/or TXCLR wait for 2 PCM clocks to ensure the

FIFOs are reset. The SYNC bit can be used to determine when 2 clocks have passed.

Set RXTHR/TXTHR to determine the FIFO thresholds.