Datasheet

Product data sheet

COMPANY PUBLIC

Rev. 5.2 — 16 June 2016

111352 93 of 137

NXP Semiconductors

PN512

Full NFC Forum-compliant frontend

11.7.3 Additional hardware support for FeliCa and NFC

Additionally to the polling sequence support for the Felica mode, the PN512 supports the

check of the Len-byte.

The received Len-byte in accordance to the registers FelNFC1Reg and FelNFC2Reg:

DataLenMin in register FelNFC1Reg defines the minimum length of the accepted packet

length. This register is six bit long. Each bit represents a length of four bytes.

DataLenMax in register FelNFC2Reg defines the maximum length of the accepted

package. This register is six bit long. Each bit represents a length of four bytes. If set to

logic 1 this limit is ignored. If the length is not in the supposed range, the packet is not

transferred to the FIFO and receiving is kept active.

Example 1:

• DataLenMin = 4

– The length shall be greater or equal 16.

• DataLenMax = 5

– The length shall be smaller than 20. Valid area: 16, 17, 18, 19

Example 2:

• DataLenMin = 9

– The length shall be greater or equal 36.

• DataLenMax = 0

– The length shall be smaller than 256. Valid area: 36 to 255

11.7.4 CRC coprocessor

The following CRC coprocessor parameters can be configured:

• The CRC preset value can be either 0000h, 6363h, A671h or FFFFh depending on

the ModeReg register’s CRCPreset[1:0] bits setting

• The CRC polynomial for the 16-bit CRC is fixed to x

• The CRCResultReg register indicates the result of the CRC calculation. This register

is split into two 8-bit registers representing the higher and lower bytes.

• The ModeReg register’s MSBFirst bit indicates that data will be loaded with the MSB

first.

Table 156. CRC coprocessor parameters

Parameter Value

CRC register length 16-bit CRC

CRC algorithm algorithm according to ISO/IEC 14443 A and ITU-T

CRC preset value 0000h, 6363h, A671h or FFFFh depending on the setting of the

ModeReg register’s CRCPreset[1:0] bits