Datasheet

Product data sheet

COMPANY PUBLIC

Rev. 5.2 — 16 June 2016

111352 80 of 137

NXP Semiconductors

PN512

Full NFC Forum-compliant frontend

9.4.8 High-speed mode

In High-speed mode (HS mode), the device can transfer information at data rates of up to

3.4 Mbit/s, while remaining fully downward-compatible with Fast or Standard mode

(F/S mode) for bidirectional communication in a mixed-speed bus system.

9.4.9 High-speed transfer

To achieve data rates of up to 3.4 Mbit/s the following improvements have been made to

C-bus operation.

• The inputs of the device in HS mode incorporate spike suppression, a Schmitt trigger

on the SDA and SCL inputs and different timing constants when compared to

F/S mode

• The output buffers of the device in HS mode incorporate slope control of the falling

edges of the SDA and SCL signals with different fall times compared to F/S mode

9.4.10 Serial data transfer format in HS mode

The HS mode serial data transfer format meets the Standard mode I

C-bus specification.

HS mode can only start after all of the following conditions (all of which are in F/S mode):

1. START condition (S)

2. 8-bit master code (00001XXXb)

3. Not-acknowledge bit (A

)

When HS mode starts, the active master sends a repeated START condition (Sr) followed

by a 7-bit slave address with a R/W bit address and receives an acknowledge bit (A) from

the selected PN512.

Data transfer continues in HS mode after the next repeated START (Sr), only switching

back to F/S mode after a STOP condition (P). To reduce the overhead of the master code,

a master links a number of HS mode transfers, separated by repeated START conditions

(Sr).

Fig 24. I

C-bus HS mode protocol switch

F/S mode

HS mode (current-source for SCL HIGH enabled)

F/S mode

001aak749

AA A/ADATA

(n-bytes + A)

S R/WMASTER CODE Sr SLAVE ADDRESS

HS mode continues

SLAVE ADDRESS