Datasheet

PN512 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 5.2 — 16 June 2016
111352 67 of 137
NXP Semiconductors
PN512
Full NFC Forum-compliant frontend
8.2.4.10 TestDAC1Reg
Defines the testvalues for TestDAC1.
8.2.4.11 TestDAC2Reg
Defines the testvalue for TestDAC2.
8.2.4.12 TestADCReg
Shows the actual value of ADC I and Q channel.
Table 129. TestDAC1Reg register (address 39h); reset value: XXh, 00XXXXXXb
7 6 5 4 3 2 1 0
0 0 TestDAC1
Access
Rights
RFT RFU r/w r/w r/w r/w r/w r/w
Table 130. Description of TestDAC1Reg bits
Bit Symbol Description
7 - Reserved for production tests.
6 - Reserved for future use.
5 to 0 TestDAC1 Defines the testvalue for TestDAC1. The output of the DAC1 can be
switched to AUX1 by setting AnalogSelAux1 to 0001 in register
AnalogTestReg.
Table 131. TestDAC2Reg register (address 3Ah); reset value: XXh, 00XXXXXXb
7 6 5 4 3 2 1 0
0 0 TestDAC2
Access
Rights
RFU RFU r/w r/w r/w r/w r/w r/w
Table 132. Description ofTestDAC2Reg bits
Bit Symbol Description
7 to 6 - Reserved for future use.
5 to 0 TestDAC2 Defines the testvalue for TestDAC2. The output of the DAC2 can be
switched to AUX2 by setting AnalogSelAux2 to 0001 in register
AnalogTestReg.
Table 133. TestADCReg register (address 3Bh); reset value: XXh, XXXXXXXXb
7 6 5 4 3 2 1 0
ADC_I ADC_Q
Access
Rights
Table 134. Description of TestADCReg bits
Bit Symbol Description
7 to 4 ADC_I Shows the actual value of ADC I channel.
3 to 0 ADC_Q Shows the actual value of ADC Q channel.