Datasheet
PN512 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 5.2 — 16 June 2016
111352 66 of 137
NXP Semiconductors
PN512
Full NFC Forum-compliant frontend
8.2.4.9 AnalogTestReg
Controls the pins AUX1 and AUX2
Table 127. AnalogTestReg register (address 38h); reset value: 00h, 00000000b
7 6 5 4 3 2 1 0
AnalogSelAux1 AnalogSelAux2
Access Rights r/w r/w r/w r/w r/w r/w r/w r/w
Table 128. Description of AnalogTestReg bits
Bit Symbol Description
7 to 4
3to 0
AnalogSelAux1
AnalogSelAux2
Controls the AUX pin.
Note: All test signals are described in Section 19 “Testsignals”.
Value Description
0000 Tristate
0001 Output of TestDAC1 (AUX1), output of TESTDAC2 (AUX2)
Note: Current output. The use of 1 k pull-down resistor on AUX is recommended.
0010 Testsignal Corr1
Note: Current output. The use of 1 k pull-down resistor on AUX is recommended.
0011 Testsignal Corr2
Note: Current output. The use of 1 k pull-down resistor on AUX is recommended.
0100 Testsignal MinLevel
Note: Current output. The use of 1 k pull-down resistor on AUX is recommended.
0101 Testsignal ADC channel I
Note: Current output. The use of 1 k pull-down resistor on AUX is recommended.
0110 Testsignal ADC channel Q
Note: Current output. The use of 1 k pull-down resistor on AUX is recommended.
0111 Testsignal ADC channel I combined with Q
Note: Current output. The use of 1 k pull-down resistor on AUX is recommended.
1000 Testsignal for production test
Note: Current output. The use of 1 k pull-down resistor on AUX is recommended.
1001 SAM clock (13.56 MHz)
1010 HIGH
1011 LOW
1100 TxActive
At 106 kbit: HIGH during Startbit, Data bit, Parity and CRC. At 212 and 424 kbit: High
during Preamble, Sync, Data and CRC.
1101 RxActive
At 106 kbit: High during databit, Parity and CRC.
At 212 and 424 kbit: High during data and CRC.
1110 Subcarrier detected
106 kbit: not applicable
212 and 424 kbit: High during last part of Preamble, Sync data and CRC
1111 TestBus-Bit as defined by the TstBusBitSel in register TestSel1Reg.