Datasheet

PN512 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 5.2 — 16 June 2016
111352 60 of 137
NXP Semiconductors
PN512
Full NFC Forum-compliant frontend
8.2.3.12 TCounterValReg
Contains the current value of the timer.
Note: The Counter value is split into two 8-bit register.
8.2.4 Page 3: Test
8.2.4.1 PageReg
Selects the register page.
Table 107. TCounterValReg (Higher bits) register (address 2Eh); reset value: XXh,
XXXXXXXXb
7 6 5 4 3 2 1 0
TCounterVal_Hi
Access
Rights
rrrrrrrr
Table 108. Description of the higher TCounterValReg bits
Bit Symbol Description
7 to 0 TCounterVal_Hi Current value of the timer, higher 8 bits.
Table 109. TCounterValReg (Lower bits) register (address 2Fh); reset value: XXh,
XXXXXXXXb
7 6 5 4 3 2 1 0
TCounterVal_Lo
Access
Rights
rrrrrrrr
Table 110. Description of lower TCounterValReg bits
Bit Symbol Description
7 to 0 TCounterVal_Lo Current value of the timer, lower 8 bits.
Table 111. PageReg register (address 30h); reset value: 00h, 00000000b
7 6 5 4 3 2 1 0
UsePageSelect00000PageSelect
Access
Rights
r/w RFU RFU RFU RFU RFU r/w r/w