Datasheet

Product data sheet

COMPANY PUBLIC

Rev. 5.2 — 16 June 2016

111352 53 of 137

NXP Semiconductors

PN512

Full NFC Forum-compliant frontend

8.2.3.3 GsNOffReg

Selects the conductance for the N-driver of the antenna driver pins TX1 and TX2 when the

driver is switched off.

Table 84. Description of CRCResultReg bits

Bit Symbol Description

7 to 0 CRCResultLSB This register shows the actual value of the least significant byte of

the CRCResult register. It is valid only if bit CRCReady in register

Status1Reg is set to logic 1.

Table 85. GsNOffReg register (address 23h); reset value: 88h, 10001000b

7 6 5 4 3 2 1 0

CWGsNOff ModGsNOff

Access

Rights

r/w r/w r/w r/w r/w r/w r/w r/w

Table 86. Description of GsNOffReg bits

Bit Symbol Description

7 to 4 CWGsNOff The value of this register defines the conductance of the output

N-driver during times of no modulation.

Note: The conductance value is binary weighted.

Note: During soft Power-down mode the highest bit is forced to 1.

Note: The value of the register is only used if the driver is switched

off. Otherwise the bit value CWGsNOn of register GsNOnReg is

used.

Note: This value is used for LoadModulation.

3 to 0 ModGsNOff The value of this register defines the conductance of the output

N-driver for the time of modulation. This may be used to regulate the

modulation index.

Note: The conductance value is binary weighted.

Note: During soft Power-down mode the highest bit is forced to 1.

Note: The value of the register is only used if the driver is switched

off. Otherwise the bit value ModGsNOn of register GsNOnReg is

used

Note: This value is used for LoadModulation.