Datasheet

PN512 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 5.2 — 16 June 2016
111352 52 of 137
NXP Semiconductors
PN512
Full NFC Forum-compliant frontend
8.2.3 Page 2: Configuration
8.2.3.1 PageReg
Selects the register page.
8.2.3.2 CRCResultReg
Shows the actual MSB and LSB values of the CRC calculation.
Note: The CRC is split into two 8-bit register.
Note: Setting the bit MSBFirst in ModeReg register reverses the bit order, the byte order is
not changed.
Table 79. PageReg register (address 20h); reset value: 00h, 00000000b
7 6 5 4 3 2 1 0
UsePageSelect 0 0 0 0 0 PageSelect
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Table 80. Description of PageReg bits
Bit Symbol Description
7 UsePageSelect Set to logic 1, the value of PageSelect is used as register address A5
and A4. The LSB-bits of the register address are defined by the
address pins or the internal address latch, respectively.
Set to logic 0, the whole content of the internal address latch defines
the register address. The address pins are used as described in
Section 9.1 “
Automatic microcontroller interface detection”.
6 to 2 - Reserved for future use.
1 to 0 PageSelect The value of PageSelect is used only if UsePageSelect is set to
logic 1. In this case, it specifies the register page (which is A5 and
A4of the register address).
Table 81. CRCResultReg register (address 21h); reset value: FFh, 11111111b
7 6 5 4 3 2 1 0
CRCResultMSB
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Table 82. Description of CRCResultReg bits
Bit Symbol Description
7 to 0 CRCResultMSB This register shows the actual value of the most significant byte of
the CRCResultReg register. It is valid only if bit CRCReady in
register Status1Reg is set to logic 1.
Table 83. CRCResultReg register (address 22h); reset value: FFh, 11111111b
7 6 5 4 3 2 1 0
CRCResultLSB
Access Rightsrrrrrrrr