Datasheet
PN512 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 5.2 — 16 June 2016
111352 112 of 137
NXP Semiconductors
PN512
Full NFC Forum-compliant frontend
[1] Supply voltages below 3 V reduce the performance (the achievable operating distance).
[2] V
DDA
, V
DDD
and V
DD(TVDD)
must always be the same voltage.
[3] V
DD(PVDD)
must always be the same or lower voltage than V
DDD
.
24. Thermal characteristics
25. Characteristics
V
DD(PVDD)
PVDD supply voltage V
DD(PVDD)
V
DDA
= V
DDD
= V
DD(TVDD)
;
V
SSA
=V
SSD
=V
SS(PVSS)
=V
SS(TVSS)
=0V
[3]
1.6- 3.6V
V
DD(SVDD)
SVDD supply voltage V
SSA
=V
SSD
=V
SS(PVSS)
=V
SS(TVSS)
=0V 1.6 - 3.6 V
T
amb
ambient temperature HVQFN32, HVQFN40, TFBGA64 30 - +85 C
Industrial version PN512AA0HN1:
T
amb
ambient temperature HVQFN32 40 - +90 C
Table 167. Operating conditions
…continued
Symbol Parameter Conditions Min Typ Max Unit
Table 168. Thermal characteristics
Symbol Parameter Conditions Package Typ Unit
R
thj-a
Thermal resistance from
junction to ambient
In still air with exposed pad
soldered on a 4 layer Jedec PCB
In still air
HVQFN32 40 K/W
HVQFN40 35 K/W
TFBGA64 46.9 K/W
Table 169. Characteristics
Symbol Parameter Conditions Min Typ Max Unit
Input characteristics
Pins A0, A1 and NRSTPD
I
LI
input leakage current 1-+1 A
V
IH
HIGH-level input voltage 0.7V
DD(PVDD)
-- V
V
IL
LOW-level input voltage - - 0.3V
DD(PVDD)
V
Pin SIGIN
I
LI
input leakage current 1-+1 A
V
IH
HIGH-level input voltage 0.7V
DD(SVDD)
-- V
V
IL
LOW-level input voltage - - 0.3V
DD(SVDD)
V
Pin ALE
I
LI
input leakage current 1-+1 A
V
IH
HIGH-level input voltage 0.7V
DD(PVDD)
-- V
V
IL
LOW-level input voltage - - 0.3V
DD(PVDD)
V
Pin RX
[1]
V
i
input voltage 1-V
DDA
+1 V
C
i
input capacitance V
DDA
= 3 V; receiver active;
V
RX(p-p)
= 1V; 1.5V (DC)
offset
-10- pF