Datasheet

PN512 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 5.2 — 16 June 2016
111352 10 of 137
NXP Semiconductors
PN512
Full NFC Forum-compliant frontend
6.2 Pin description
Table 3. Pin description HVQFN32
Pin Symbol Type Description
1A1IAddress Line
2 PVDD PWR Pad power supply
3DVDDPWRDigital Power Supply
4 DVSS PWR Digital Ground
5 PVSS PWR Pad power supply ground
6 NRSTPD I Not Reset and Power Down: When LOW, internal current sinks are switched off, the
oscillator is inhibited, and the input pads are disconnected from the outside world. With
a positive edge on this pin the internal reset phase starts.
7 SIGIN I Communication Interface Input: accepts a digital, serial data stream
8 SIGOUT O Communication Interface Output: delivers a serial data stream
9 SVDD PWR S2C Pad Power Supply: provides power to the S
2
C pads
10 TVSS PWR Transmitter Ground: supplies the output stage of TX1 and TX2
11 TX1 O Transmitter 1: delivers the modulated 13.56 MHz energy carrier
12 TVDD PWR Transmitter Power Supply: supplies the output stage of TX1 and TX2
13 TX2 O Transmitter 2: delivers the modulated 13.56 MHz energy carrier
14 TVSS PWR Transmitter Ground: supplies the output stage of TX1 and TX2
15 AVDD PWR Analog Power Supply
16 VMID PWR Internal Reference Voltage: This pin delivers the internal reference voltage.
17 RX I Receiver Input
18 AVSS PWR Analog Ground
19 AUX1 O Auxiliary Outputs: These pins are used for testing.
20 AUX2 O
21 OSCIN I Crystal Oscillator Input: input to the inverting amplifier of the oscillator. This pin is
also the input for an externally generated clock (f
osc
= 27.12 MHz).
22 OSCOUT O Crystal Oscillator Output: Output of the inverting amplifier of the oscillator.
23 IRQ O Interrupt Request: output to signal an interrupt event
24 ALE I Address Latch Enable: signal to latch AD0 to AD5 into the internal address latch
when HIGH.
25 to 31 D1 to D7 I/O 8-bit Bi-directional Data Bus.
Remark: An 8-bit parallel interface is not available.
Remark: If the host controller selects I
2
C as digital host controller interface, these pins
can be used to define the I
2
C address.
Remark: For serial interfaces this pins can be used for test signals or I/Os.
32 A0 I Address Line