Specifications

34 TMS320C6457 Fixed-Point Digital Signal Processor Silicon Errata SPRZ293A—November 2009
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Workaround 2: To reduce the SDMA/IDMA stalling system impact, perform any of the following:
1. Improve system tolerance on DMA side (SDMA/IDMA/MDMA):
– Understand and minimize latency-critical SDMA/IDMA accesses to L2 or
L1P/D.
– Directly reduce critical real-time deadlines, if possible, at peripheral/IO level
(e.g., increase word size and/or reduce bit rates on serial ports).
– Reduce DSP MDMA latency:
› Increase the priority of the DSP access to DDR2 such that MDMA latency
of MDMA accesses causing stalls is minimized.
Note—Note: Other masters may have real-time deadlines that dictate higher
priority than the DSP.
› Lower the PRIO_RAISE field setting in the DDR2 memory controller's
burst priority register. Values ranging between 0x10 and 0x20 should give
adequate performance and minimize latency; lower values may cause
excessive SDRAM row thrashing. Minimize offending scenarios on
DSP/caching side:
– If the DSP performing non-cacheable writes is causing the issue, insert
protected non-cacheable reads (as shown in the last list item below) every few
writes to allow the write buffer to empty.
– Use explicit cache commands to trigger cache writebacks during appropriate
times (L1D Writeback All, L2 Writeback All). Do not use these commands
when real-time deadlines must be met.
– Restructure program data and data flow to minimize the offending cache
activity.
› Define the read-only data as const. The const C keyword tells the compiler
not to write to the array. By default, such arrays are allocated to the .const
section as opposed to BSS. With a suitable linker command file, the
developer can link the .const section off chip, while linking .bss on chip.
Because programs initialize .bss at run time, this reduces the program's
initialization time and total memory image.
› Explicitly allocate lookup tables and writeable buffers to their own
sections. The #pragma DATA_SECTION (label, section) directive tells
the compiler to place a particular variable in the specified COFF section.
The developer can explicitly control the layout of the program with this
directive and an appropriate linker command file.
› Avoid directly accessing data in slow memories (e.g., flash); copy at
initialization time to faster memories.
– Modify troublesome code.
› Rewrite using DMAs to minimize data cache writebacks. If the code
accesses a large quantity of data externally, consider using DMAs to bring
in the data, using double buffering and related techniques. This will
minimize cache write-back traffic and the likelihood of SDMA/IDMA
stalling.