User manual

Raisonance Tools for ARM 6. Debugging with hardware tools
- When Data Value matching 2 addresses is used, the Comparator 2 and 3 are implicitly used, and are
no longer available for another match condition. These two addresses are not connected and do not
form any range together.
Action: A drop-down box allows selection of the action:
• Sample PC: generates a trace event containing the address of the instruction that was executing
at the moment of the matching condition, during read or write access.
• Sample data address (RW access): generates a trace event containing the lower 16 bits of the
address of the memory location to which data access was being performed by the CPU at the
moment of the matching condition, during read or write access.
• Sample data value (RW access): generates a trace event containing the data value of the
memory location to which data access was being performed by the CPU at the moment of the
matching condition, during read or write access.
• Sample data address + data value (RW access): generates two trace events, as defined above
(data address and data value).
• Sample PC + data value: generates two trace events, as defined above (Sample PC and data
value).
• Stop CPU: generate a watchpoint at the moment of the matching condition, during Read or
Write access.
• Stop CPU (RO access): generate a watchpoint at the moment of the matching condition, only
during read access.
• Stop CPU (WO access): generate a watchpoint at the moment of the matching condition, only
during write access.
• Generate ETM event trigger: generates a ETM trigger at the moment of the matching condition,
during read or write access.
• Generate ETM event trigger (RO access): generates a ETM trigger at the moment of the
matching condition, only during read access.
• Generate ETM event trigger (WO access): generates a ETM trigger at the moment of the
matching condition, only during write access.
Ignore: A drop-down box allows selection of the bit length of the mask applied to the address: it
specifies the number of least significant address bits to be ignored by the comparator during address
match, from 0 to 15, in order to form a range value condition.
Data size: A drop-down box selects the data size for data value matching: 8 bits, 16 bits or 32 bits.
Notes:
The available functionalities depend on the hardware implementation of the connected target CPU.
When trace is enabled, watchpoints must be configured by this dialog box, they are no longer
available on Memory View.
All these configurations are saved within the project, except the global enable: the watchpoints are
systematically disabled at the beginning of the debug session.
The ETM event triggers are only for further use as control inputs to ETM trace hardware.
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