User manual
Table Of Contents
- 1. Introduction
- 2. Raisonance tools for ARM overview
- 3. How to register the new Raisonance tools for ARM
- 4. Creating a project
- 5. Debugging with the simulator
- 6. Debugging with hardware tools
- 6.1 Selecting hardware debugging tools
- 6.2 RLink-ARM programming and debugging features
- 6.3 JTAGjet programming and debugging features
- 6.4 Cortex Serial Wire Viewer (SWV) debugging features (Open4 RLink only)
- 6.4.1 Introduction
- 6.4.2 Hardware requirements
- 6.4.3 Configure Ride7 to use the SWV
- 6.4.4 Modify your application to use SWV software traces
- 6.4.5 Configure Ride7 to use SWV software traces
- 6.4.6 Configuring Ride7 to use the SWV hardware traces
- 6.4.7 Configuring Ride7 to use the SWV watchpoint traces
- 6.4.8 Start / Stop the trace
- 6.4.9 Visualizing SWV traces with Ride7
- 7. Raisonance solutions for ARM upgrades
- 8. Conformity
- 9. Glossary
- 10. Index
- 11. History

Raisonance Tools for ARM 4. Creating a project
4.3 Boot mode choices
After a reset, the ARM microcontrollers start executing the code at address zero:
• For the STR71x, STR75x and STM32x, this code is an image of one of the other memory
spaces – Flash, RAM, or External Memory. The boot mode is determined by the state of specific
pins at reset. See your device datasheet for more information.
• For the STR73x, STR91x, and LPCxx, only the Flash can be mapped at 0. However, a pseudo
RAM mode can be managed by Ride7: the application is loaded in RAM and the reset vector
just jumps to the RAM segment.
Flash is the standard mode, which your application will very probably use in the final product. You may
prefer to use RAM mode if you require more breakpoints for debugging, as long as the RAM is large
enough to hold the program. RAM mode cannot be used in the final application because RAM content
is modified by a power down.
Warning: When using a hardware debugger or programmer, always make sure that the mode
specified in the software options matches the mode selected by hardware.
4.3.1 Flash mode
For all devices startup code is placed at the start of Flash by the linker. The rest of the code is placed
after the startup in Flash.
4.3.1.1 STR7 and STM32 devices
Flash is also seen at address 0. The data initialization values are also placed in Flash, and then copied
to RAM by the startup code. The read-only data is also placed in the Flash and is directly accessed
there during the execution of the application.
4.3.1.2 STR9 devices
By default, bank0 of Flash resides at address 0 (e.g. CSX = 0)
and bank1 (32KB) resides at address 0x400000.
However, you can modify the option Flash Bank Selection:
• By selecting bank1 @ 0x0, you invert the respective
locations of banks 0 and 1 (bank0 will reside at the
address 0x400000),
• By modifying the High Bank Address value, you force
the relocation address of the upper bank (either bank1
or bank0). This address must be larger than the size of
the bank at address 0, and must be a multiple of the
size of the other bank.
The data initialization values are placed in Flash, and copied to
RAM by the startup code.
The read-only data is also placed in Flash and is directly
accessed from here during the execution of the application.
4.3.2 RAM mode (debug mode)
You should use this mode during the development phase of your project for faster hardware debugging
(it can also be used with the software simulator, but then it offers no advantage in terms of
download/programming time and number of breakpoints).
In RAM mode:
• For the STR71x, the RAM is at 0x20000000 but it is also seen at 0x00000000.
• For the STR73x, the RAM is physically at 0xA0000000 but it is also seen at 0x00000000.
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