Instruction Manual
W9864G2GH
- 40 -
Operating Timing Example, continued
14.17 Timing Chart of Read to Write Cycle
Note: The Output data must be masked by DQM to avoid I/O conflict.
Read Write
1110987654321
Read
Read
Read Write
Write
D0 D1 D2 D3
Write
DQ
DQ
( a ) Command
0
DQ
DQ
DQM
( b ) Command
DQM
( b ) Command
DQM
DQM
D0 D1 D2 D3
D0 D1 D2 D3
D0 D1 D2 D3
(1) CAS Latency=2
( a ) Command
(2) CAS Latency=3
In the case of Burst Length = 4










