Instruction Manual

W9864G2GH
- 24 -
14. OPERATING TIMING EXAMPLE
14.1 Interleaved Bank Read (Burst Length = 4, CAS Latency = 3)
0
1 2 3 4 5
6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
(CLK = 100 MHz)
CLK
DQ
CKE
DQM
A0-A9
A10
WE
CS
t RC t RC
t RC t RC
t RAS t RP t RAS t RP
t RP t RAS t RAS
t RCD
t RCD t RCD t RCD
t AC
t AC
t AC
t AC
t RRD t RRD
t RRD
t RRD
Active
Read
Active Read
Active
Active
Active
Read
Read
Precharge
Precharge
Precharge
RAa RBb RAc RBd
RAe
RAa
CAw
RBb
CBx
RAc CAy
RBd CBz
RAe
aw0
aw1
aw2 aw3 bx0
bx1
bx2
bx3
cy0
cy1
cy2
cy3
Bank #0
Idle
Bank #1
Bank #2
Bank #3
RAS
CAS
BS1
BS0