Instruction Manual

W9864G2GH
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tCL is the pulse width of CLK measured from the negative edge to the positive edge referenced to VIL (max.).
(2) A.C Latency Characteristics
CKE to clock disable (CKE Latency) 1 tCK
DQM to output to HI-Z (Read DQM Latency) 2
DQM to output to HI-Z (Write DQM Latency) 0
Write command to input data (Write Data Latency) 0
CS to Command input ( CS Latency)
0
CL = 2 2
Precharge to DQ Hi-Z Lead time
CL = 3 3
CL = 2 1
Precharge to Last Valid data out
CL = 3 2
CL = 2 2
Bust Stop Command to DQ Hi-Z Lead time
CL = 3 3
CL = 2 1
Bust Stop Command to Last Valid Data out
CL = 3 2
CL = 2 BL + tRP tCK + nS
Read with Auto-precharge Command to Active/Ref
Command
CL = 3 BL + tRP
CL = 2 (BL+1)+ tRP
Write with Auto-precharge Command to Active/Ref Command
CL = 3 (BL+1)+ tRP
7.
Assumed input rise and fall time (tr & tf) = 1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]ns should be added to the parameter.
( The tT maximum can’t be more than 10nS for low frequency application. )