Instruction Manual

Preliminary W79E8213/W79E8213R Data Sheet
Publication Release Date: July 11, 2008
- 39 - Revision A2
Continued
BIT NAME FUNCTION
4 PADIDS.4
P0.4 digital input disable bit.
0: Default (With digital/analog input).
1: Disable Digital Input of ADC Input Channel 1.
3 PADIDS.3
P0.3 digital input disable bit.
0: Default (With digital/analog input).
1: Disable Digital Input of ADC Input Channel 0.
2 PADIDS.2
P0.2 digital input disable bit.
0: Default (With digital/analog input).
1: Disable Digital Input of ADC Input Channel 4.
1 PADIDS.1
P0.1 digital input disable bit.
0: Default (With digital/analog input).
1: Disable Digital Input of ADC Input Channel 5.
0 PADIDS.0
P0.0 digital input disable bit.
0: Default (With digital/analog input).
1: Disable Digital Input of ADC Input Channel 6.
Note: Port 0 (ADC input pins) should also be set to Input Only (High Impedance) during when
using the port for ADC application. Please see I/O Port Configuration section.
INTERRUPT HIGH PRIORITY 1
Bit: 7 6 5 4 3 2 1 0
PEDH PPWMH PBKH PWDIH - - - -
Mnemonic: IP1H Address: F7h
BIT NAME FUNCTION
7 PEDH 1: To set interrupt high priority of edge detect is highest priority level.
6 PPWMH 1: To set interrupt priority of PWM underflow is highest priority level.
5 PBKH 1: To set interrupt priority of PWM’s external brake is highest priority level.
4 PWDIH 1: To set interrupt high priority of Watchdog is highest priority level.
3-0 - Reserved.
EXTENDED INTERRUPT PRIORITY
Bit: 7 6 5 4 3 2 1 0
PED PPWM PBK PWDI - - - -
Mnemonic: IP1 Address: F8h