Instruction Manual

Preliminary W79E8213/W79E8213R Data Sheet
Publication Release Date: July 11, 2008
- 25 - Revision A2
PORT 2 OUTPUT MODE 1
Bit: 7 6 5 4 3 2 1 0
P2S P1S P0S ENCLK T1OE T0OE P2M1.1 P2M1.0
Mnemonic: P2M1 Address: B5h
BIT NAME FUNCTION
7 P2S
0: Disable Schmitt trigger inputs on port 2 and enable TTL inputs on port 2.
1: Enables Schmitt trigger inputs on Port 2.
6 P1S
0: Disable Schmitt trigger inputs on port 1 and enable TTL inputs on port 1.
1: Enables Schmitt trigger inputs on Port 1.
5 P0S
0: Disable Schmitt trigger inputs on port 0 and enable TTL inputs on port 0
1: Enables Schmitt trigger inputs on Port 0.
4 ENCLK 1: Enabled clock output to XTAL2 pin (P2.0).
3 T1OE
1: The P0.7 pin is toggled whenever Timer 1 overflows. The output frequency is
therefore one half of the Timer 1 overflow rate.
2 T0OE
1: The P1.2 pin is toggled whenever Timer 0 overflows. The output frequency is
therefore one half of the Timer 0 overflow rate.
1 P2M1.1 To control the output configuration of P2.1.
0 P2M1.0 To control the output configuration of P2.0.
PORT 2 OUTPUT MODE 2
Bit: 7 6 5 4 3 2 1 0
- - - - - - P2M2.1 P2M2.0
Mnemonic: P2M2 Address: B6h
BIT NAME FUNCTION
7-2 - Reserved.
1-0 P2M2.[1:0] To control the output configuration of P2 bits [1:0]
Port Output Configuration Settings:
PXM1.Y
(SEE NOTE)
PXM2.Y PORT INPUT/OUTPUT MODE
0 0 Quasi-bidirectional
0 1 Push-Pull
1 0
Input Only (High Impedance)
P2M1.PxS=0, TTL input
P2M1.PxS=1, Schmitt input
1 1 Open Drain