Instruction Manual

Preliminary W79E8213/W79E8213R Data Sheet
Publication Release Date: July 11, 2008
- 21 - Revision A2
CLOCK CONTROL
Bit: 7 6 5 4 3 2 1 0
- - - T1M T0M - - -
Mnemonic: CKCON Address: 8Eh
BIT NAME FUNCTION
7-5
- Reserved.
4
T1M
Timer 1 clock select:
0: Timer 1 uses a divide by 12 clocks.
1: Timer 1 uses a divide by 4 clocks.
3
T0M
Timer 0 clock select:
0: Timer 0 uses a divide by 12 clocks.
1: Timer 0 uses a divide by 4 clocks.
2-0
- Reserved.
PORT 1
Bit: 7 6 5 4 3 2 1 0
P1.7 P1.6 P1.5 P1.4 P1.3 P1.2 P1.1 P1.0
Mnemonic: P1 Address: 90h
P1.7-0: General purpose Input/Output port. Most instructions will read the port pins in case of a port
read access, however in case of read-modify-write instructions, the port latch is read. These alternate
functions are described below:
BIT NAME FUNCTION
7
P1.7 PWM2 pin by alternative.
6
P1.6 PWM1 pin by alternative.
5
P1.5 /RST pin or input pin by alternative.
4
P1.4 STADC pin or /INT1 interrupt pin by alternative.
3
P1.3 /INT0 interrupt pin by alternative.
2
P1.2 Timer 0 pin or ED2 pin by alternative.
1
P1.1 ED1 pin by alternative.
0
P1.0 BUZ pin or ED0 pin by alternative.
Note: During power-on-reset, the port pins are tri-stated. After power-on-reset, the value of the port is set by CONFIG0.PRHI
bit. The default setting for CONFIG0.PRHI =1 which the alternative function output is turned on upon reset. If
CONFIG0.PRHI is set to 0, the user has to write a 1 to port SFR to turn on the alternative function output.
PORT 2
Bit: 7 6 5 4 3 2 1 0
- - - - - - P2.1 P2.0
Mnemonic: P2 Address: A0h