Manual

W78C32C
- 6 -
Reset
The external RESET signal is sampled at S5P2. To take effect, it must be held high for at least two
machine cycles while the oscillator is running.
An internal trigger circuit in the reset line is used to deglitch the reset line when the W78C32C is used
with an external RC network. The reset logic also has a special glitch removal circuit that ignores
glitches on the reset line.
During reset, the ports are initialized to FFH, the stack pointer to 07H, PCON (with the exception of
bit 4) to 00H, and all of the other SFR registers except SBUF to 00H. SBUF is not reset.
ABSOLUTE MAXIMUM RATINGS
PARAMETER SYMBOL MIN. MAX. UNIT
DC Power Supply V
CC
−
V
SS
-0.3 +7.0 V
Input Voltage V
IN
V
SS
-0.3 V
CC
+0.3 V
Operating Temperature T
A
0 70
°
C
Storage Temperature T
ST
-55 +150
°
C
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of
the device.
DC CHARACTERISTICS
VCC
−
V
SS = 5V
±
10%, TA = 25
°
C, FOSC = 20 MHz unless otherwise specified.
PARAMETER SYM. TEST CONDITIONS SPECIFICATION UNIT
MIN. TYP.
MAX.
Operating Voltage V
DD
-
4.5 5 5.5 V
Operating Current I
DD
No load
V
DD
= 5.5V
- - 30 mA
Idle Current I
IDLE
Idle mode
V
DD
= 5.5V
- - 6 mA
Power Down Current I
PWDN
Power-down mode
V
DD
= 5.5V
- - 50
µ
A
Input Current
P1, P3
I
IN1
V
DD
= 5.5V
V
IN
= 0V or V
DD
-75 - +10
µ
A
Input Current
RST
(*2)
I
IN2
V
DD
= 5.5V
V
IN
= V
DD
- +184 +350
µ
A
Input Leakage Current
P0
(*1)
I
LK
V
DD
= 5.5V
0V<V
IN
<V
DD
-10 - +10
µA
Output Low Voltage
P1, P2
(*1)
, P3
V
OL1
V
DD
= 4.5V
I
OL1
= +2 mA
- - 0.45 V
Output Low Voltage
ALE,
PSEN
, P0
(*1)
V
OL2
V
DD
= 4.5V
I
OL2
= +4 mA
- - 0.45 V