Instruction Manual

2
TH7834C
1997A–IMAGE–05/02
Pin Description
Pin Number Symbol Designation
1V
OS1
Output 1 (Odd Pixels)
2V
DR1
Reset DC Bias (Output 1)
3V
S1
Amplifier Source Bias (Output 1)
4 Φ
R1-2
Reset Clock (Outputs 1 and 2)
5, 9, 14, 15, 20, 24, 33,
37, 42, 43, 48, 52
V
SS
Substrate Bias (Ground)
6, 34 VST Pixel Storage Gate DC Bias
7 Φ
A1-2
Antiblooming and/or Exposure Time Control
8V
GS1-2
Output Gate DC Bias
10 Φ
3A
Register Main Transport Clock
11 Φ
1A
Register Main Transport Clock
12 Φ
4A
Register Main Transport Clock
13 Φ
2A
Register Main Transport Clock
16 Φ
2C
Register Main Transport Clock
17 Φ
4C
Register Main Transport Clock
18 Φ
1C
Register Main Transport Clock
19 Φ
3C
Register Main Transport Clock
21 Φ
P3-4
Transfer Clock
22 VA
3-4
Antiblooming Diode Bias
23 Φ
LS3-4
Register End Transport Clock
25 V
DD3-4
Amplifier Drain Supplies (Outputs 3, 4)
26 V
S3
Amplifier Source Bias (Output 3)
27 V
DR3
Reset DC Bias (Output 3)
28 V
OS3
Output 3 (Odd Pixels)
29 V
OS4
Output 4 (Even Pixels)
30 V
DR4
Reset DC Bias (Output 4)
31 V
S4
Amplifier Source Bias (Output 4)
32 Φ
R3-4
Reset Clock (Outputs 3 and 4)
35 Φ
A3-4
Antiblooming and/or Exposure Time Control
36 V
GS3-4
Output Gate DC Bias
38 Φ
3D
Register Main Transport Clock
39 Φ
1D
Register Main Transport Clock
40 Φ
4D
Register Main Transport Clock
41 Φ
2D
Register Main Transport Clock
44 Φ
2B
Register Main Transport Clock
45 Φ
4B
Register Main Transport Clock