Owner's manual
Table Of Contents
- 8-bit MCU with CAN controller and Flash
- 1. Description
- 2. Features
- 3. Block Diagram
- 4. Pin Configuration
- 5. SFR Mapping
- 6. Clock
- 7. Program/Code Memory
- 8. Data Memory
- 9. EEPROM data memory
- 10. In-System-Programming (ISP)
- 11. Serial I/O Port
- 12. Timers/Counters
- 13. Timer 2
- 14. WatchDog Timer
- 15. Atmel CAN Controller
- 15.1. Introduction
- 15.2. CAN Controller Description
- 15.3. CAN Controller Mailbox and Registers Organization
- 15.4. IT CAN management
- 15.5. Bit Timing and BaudRate
- 15.6. Fault Confinement
- 15.7. Acceptance filter
- 15.8. Data and Remote frame
- 15.9. Time Trigger Communication (TTC) and Message Stamping
- 15.10. CAN Autobaud and Listening mode
- 15.11. CAN SFR’s
- 15.12. Registers
- 16. Programmable Counter Array PCA
- 17. Analog-to-Digital Converter (ADC)
- 18. Interrupt System
- 19. Electrical Characteristics
- 20. Ordering Information
Rev.A - May 17, 2001 85
Preliminary
T89C51CC02
CANGIE (S:C1h)
CAN General Interrupt Enable
NOTE:
see Figure 59
Reset Value: xx00 000xb
Figure 70. CANGIE Register
CANEN (S:CFh Read Only)
CAN Enable message object Registers
Reset Value: xxxx 0000b
Figure 71. CANEN Register
7 6 5 4 3 2 1 0
- - ENRX ENTX ENERCH ENBUF ENERG -
Bit Number Bit Mnemonic Description
7-6 -
Reserved
The values read from these bits are indeterminate. Do not set these bits.
5 ENRX
Enable receive interrupt
0 - Disable
1 - Enable
4 ENTX
Enable transmit interrupt
0 - Disable
1 - Enable
3 ENERCH
Enable message object error interrupt
0 - Disable
1 - Enable
2 ENBUF
Enable BUF interrupt
0 - Disable
1 - Enable
1 ENERG
Enable general error interrupt
0 - Disable
1 - Enable
0-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
7 6 5 4 3 2 1 0
- - - - ENCH3 ENCH2 ENCH1 ENCH0
Bit Number Bit Mnemonic Description
7-4 -
Reserved
The value read from these bit are indeterminate. Do not set these bits.
3-0 ENCH3:0
Enable message object
0 - message object is disabled => the message object is free for a new emission or reception.
1 - message object is enabled.
This bit is resettable by re-writing the CANCONCH of the corresponding message object.