Owner's manual
Table Of Contents
- 8-bit MCU with CAN controller and Flash
- 1. Description
- 2. Features
- 3. Block Diagram
- 4. Pin Configuration
- 5. SFR Mapping
- 6. Clock
- 7. Program/Code Memory
- 8. Data Memory
- 9. EEPROM data memory
- 10. In-System-Programming (ISP)
- 11. Serial I/O Port
- 12. Timers/Counters
- 13. Timer 2
- 14. WatchDog Timer
- 15. Atmel CAN Controller
- 15.1. Introduction
- 15.2. CAN Controller Description
- 15.3. CAN Controller Mailbox and Registers Organization
- 15.4. IT CAN management
- 15.5. Bit Timing and BaudRate
- 15.6. Fault Confinement
- 15.7. Acceptance filter
- 15.8. Data and Remote frame
- 15.9. Time Trigger Communication (TTC) and Message Stamping
- 15.10. CAN Autobaud and Listening mode
- 15.11. CAN SFR’s
- 15.12. Registers
- 16. Programmable Counter Array PCA
- 17. Analog-to-Digital Converter (ADC)
- 18. Interrupt System
- 19. Electrical Characteristics
- 20. Ordering Information
82 Rev.A - May 17, 2001
Preliminary
T89C51CC02
CANGSTA (S:AAh)
CAN General Status Register
NOTE:
1. These fields are Read Only.
Reset Value: x0x0 0000b
Figure 66. CANGSTA Register
7 6 5 4 3 2 1 0
- OVFG - TBSY RBSY ENFG BOFF ERRP
Bit Number Bit Mnemonic Description
7-
Reserved
The values read from this bit isindeterminate. Do not set this bit.
6 OVFG
Overload frame flag (1)
This status bit is set by the hardware as long as the produced overload frame is sent.
This flag does not generate an interrupt
5-
Reserved
The values read from this bit isindeterminate. Do not set this bit.
4 TBSY
Transmitter busy (1)
This status bit is set by the hardware as long as the CAN transmitter generates a frame (remote, data,
overload or error frame) or an ack field. This bit is also active during an InterFrame Spacing if a
frame must be sent.
This flag does not generate an interrupt.
3 RBSY
Receiver busy (1)
This status bit is set by the hardware as long as the CAN receiver acquires or monitors a frame.
This flag does not generate an interrupt.
2 ENFG
Enable on-chip CAN controller flag (1)
Because an enable/disable command is not effective immediately, this status bit gives the true state
of a chosen mode.
This flag does not generate an interrupt.
1 BOFF
Bus off mode (1)
see Figure 61
0 ERRP
Error passive mode (1)
see Figure 61