Owner's manual
Table Of Contents
- 8-bit MCU with CAN controller and Flash
- 1. Description
- 2. Features
- 3. Block Diagram
- 4. Pin Configuration
- 5. SFR Mapping
- 6. Clock
- 7. Program/Code Memory
- 8. Data Memory
- 9. EEPROM data memory
- 10. In-System-Programming (ISP)
- 11. Serial I/O Port
- 12. Timers/Counters
- 13. Timer 2
- 14. WatchDog Timer
- 15. Atmel CAN Controller
- 15.1. Introduction
- 15.2. CAN Controller Description
- 15.3. CAN Controller Mailbox and Registers Organization
- 15.4. IT CAN management
- 15.5. Bit Timing and BaudRate
- 15.6. Fault Confinement
- 15.7. Acceptance filter
- 15.8. Data and Remote frame
- 15.9. Time Trigger Communication (TTC) and Message Stamping
- 15.10. CAN Autobaud and Listening mode
- 15.11. CAN SFR’s
- 15.12. Registers
- 16. Programmable Counter Array PCA
- 17. Analog-to-Digital Converter (ADC)
- 18. Interrupt System
- 19. Electrical Characteristics
- 20. Ordering Information
Rev.A - May 17, 2001 63
Preliminary
T89C51CC02
TL2 (S:CCh)
Timer 2 Low Byte Register
Reset Value = 0000 0000b
Not bit addressable
Figure 50. TL2 Register
RCAP2H (S:CBh)
Timer 2 Reload/Capture High Byte Register
Reset Value = 0000 0000b
Not bit addressable
Figure 51. RCAP2H Register
RCAP2L (S:CAh)
Timer 2 Reload/Capture Low Byte Register
Reset Value = 0000 0000b
Not bit addressable
Figure 52. RCAP2L Register
7 6 5 4 3 2 1 0
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Bit Number Bit Mnemonic Description
7-0 Low Byte of Timer 2.
7 6 5 4 3 2 1 0
--------
Bit Number Bit Mnemonic Description
7-0 High Byte of Timer 2 Reload/Capture.
7 6 5 4 3 2 1 0
--------
Bit Number Bit Mnemonic Description
7-0 Low Byte of Timer 2 Reload/Capture.