Owner's manual
Table Of Contents
- 8-bit MCU with CAN controller and Flash
- 1. Description
- 2. Features
- 3. Block Diagram
- 4. Pin Configuration
- 5. SFR Mapping
- 6. Clock
- 7. Program/Code Memory
- 8. Data Memory
- 9. EEPROM data memory
- 10. In-System-Programming (ISP)
- 11. Serial I/O Port
- 12. Timers/Counters
- 13. Timer 2
- 14. WatchDog Timer
- 15. Atmel CAN Controller
- 15.1. Introduction
- 15.2. CAN Controller Description
- 15.3. CAN Controller Mailbox and Registers Organization
- 15.4. IT CAN management
- 15.5. Bit Timing and BaudRate
- 15.6. Fault Confinement
- 15.7. Acceptance filter
- 15.8. Data and Remote frame
- 15.9. Time Trigger Communication (TTC) and Message Stamping
- 15.10. CAN Autobaud and Listening mode
- 15.11. CAN SFR’s
- 15.12. Registers
- 16. Programmable Counter Array PCA
- 17. Analog-to-Digital Converter (ADC)
- 18. Interrupt System
- 19. Electrical Characteristics
- 20. Ordering Information
Rev.A - May 17, 2001 3
Preliminary
T89C51CC02
4. Pin Configuration
P3.4/T0
P3.3/INT1
P4.1/RxDC
1
P3.7
P3.2/INT0
P1.5/AN5
P1.7/AN7
P1.6/AN6
P2.0
VAREF
VAVCC
VAGND
P1.0/
AN0/T2
P1.1/AN1/T2EX
P1.2/AN2/ECI
P1.3/AN3/CEX0
P1.4/AN4/CEX1
2
3
4
5
6
7
8
9
10
11
12
28
27
26
25
24
23
22
21
20
19
18
17
RESE
T
VCC
VSS
P4.0/TxDC
P2.1
P3.6
P3.5/T1
P3.1/TxD
13
P3.0/RxD
14
16
XTAL1
15
XTAL2
SO28
P1.3 / AN3 / CEX0
P1.2 / AN2 / ECI
P1.1 / AN1 / T2EX
P1.0 / AN 0 / T2
VAREF
VAGND
RESET
VSS
VCC
XTAL1
XTAL2
P3.7
P4.0/ TxDC
P4.1 / TxDC
P2.1
P3.6
25
24
23
22
21
20
19
5
6
7
8
9
10
11
12
13
14
15
16
17
18
4
3
2
P2.0
P1.4 / AN4 / CEX1
P1.5 / AN5
P1.6 / AN6
P1.7 / AN7
P3.0 / RxD
P3.1 / TxD
P3.2 / INT0
P3.3 / INT1
P3.4 / T0
P3.5 / T1
1
28
27
26
VAVCC
PLCC-28