Owner's manual
Table Of Contents
- 8-bit MCU with CAN controller and Flash
- 1. Description
- 2. Features
- 3. Block Diagram
- 4. Pin Configuration
- 5. SFR Mapping
- 6. Clock
- 7. Program/Code Memory
- 8. Data Memory
- 9. EEPROM data memory
- 10. In-System-Programming (ISP)
- 11. Serial I/O Port
- 12. Timers/Counters
- 13. Timer 2
- 14. WatchDog Timer
- 15. Atmel CAN Controller
- 15.1. Introduction
- 15.2. CAN Controller Description
- 15.3. CAN Controller Mailbox and Registers Organization
- 15.4. IT CAN management
- 15.5. Bit Timing and BaudRate
- 15.6. Fault Confinement
- 15.7. Acceptance filter
- 15.8. Data and Remote frame
- 15.9. Time Trigger Communication (TTC) and Message Stamping
- 15.10. CAN Autobaud and Listening mode
- 15.11. CAN SFR’s
- 15.12. Registers
- 16. Programmable Counter Array PCA
- 17. Analog-to-Digital Converter (ADC)
- 18. Interrupt System
- 19. Electrical Characteristics
- 20. Ordering Information
Rev.A - May 17, 2001 125
Preliminary
T89C51CC02
IPL0 (S:B8h)
Interrupt Enable Register
Reset Value: X000 0000b
bit addressable
Figure 129. IPL0 Register
7 6 5 4 3 2 1 0
- PPC PT2 PS PT1 PX1 PT0 PX0
Bit Number Bit Mnemonic Description
7-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
6 PPC
EWC Counter Interrupt Priority bit
Refer to PPCH for priority level
5 PT2
Timer 2 overflow interrupt Priority bit
Refer to PT2H for priority level.
4PS
Serial port Priority bit
Refer to PSH for priority level.
3 PT1
Timer 1 overflow interrupt Priority bit
Refer to PT1H for priority level.
2 PX1
External interrupt 1 Priority bit
Refer to PX1H for priority level.
1 PT0
Timer 0 overflow interrupt Priority bit
Refer to PT0H for priority level.
0 PX0
External interrupt 0 Priority bit
Refer to PX0H for priority level.