User Manual

26
T89C51AC2
Rev. B – 19-Dec-01
8. EEPROM Data
Memory
The 2k b yte on - chip EE PRO M memory b lock is located a t addres ses 0000h to 07FF h of
the X R A M/ERAM memory space and i s selected by setting contro l b its i n the EECO N
register. A read in the EEPRO M memory is done with a MOVX instruction.
A physical write in the EEPROM memory i s done in two steps: write data in the column
latches and transfer of all dat a latches into an EEPROM m emory row (programming).
The number of data written on the page may vary from 1 up t o 128 bytes (the page
size). W hen programmin g, only the data w ritt en i n the col umn latch is programmed and
a ninth bit is used to obt ain this feature. This provides the capability to program the
whole memory by bytes , by page or by a num ber of bytes in a page. Inde ed, eac h ninth
bit is set when the writing the c orres ponding byte in a row and all these ninth bits are
reset a fter the writing of t he complete E EPROM row.
8.1 Write Data in the
column latches
Data is written by byte to the column latche s as for an external RAM memory. Out of the
11 address bits of the data pointer, the 4 MSB s are used for page selection (row) and 7
are used for byte selection. Be tween two EEPROM programming sessions, all the
addresses in the colum n latches m us t s tay on the same page, mea ning that the 4 MSB
must no be changed.
The following procedure is used to write to the column latches:
• Sa ve and di sa ble interrupt.
• Se t bit EEE of E ECON register
• Load DPTR with the address to write
• Store A regi ster with the data to be written
• Execute a MOVX @DPTR, A
• If needed loop the three last ins truct ions until the end of a 128 by tes page
• Res tore interrupt.
Note: The last page address used when loading the column latch is the one used to select the
page pr ogramming address.
8.2 Programming The EEPROM programming consists on the following action s:
• writing one or more bytes of one page in the column latches. N ormally, all bytes
must belong to the same page; if not, the first page address wi ll be latched and the
others discarded.
• launching programmin g by writing the control sequenc e (50h followed by A0h) to the
EECON regi s ter.
• EEB USY flag in EECON is then set by h ardware to indic ate t hat programm ing is in
progress an d t hat the EEPROM segm ent is not available for reading.
• The end of programming is indica ted by a hardware clear of the E EBUSY flag.
Note: The sequence 5xh and Axh must be executed without instruct ions between t hen other-
wise the programming is abort ed.
8.3 Read Data The following procedure is used to read the data s tored in the EEPROM m emory:
• Sa ve and di sa ble interrupt
• Se t bit EEE of E ECON register
• Load DPTR with the address to read
• Execute a MOVX A, @DPTR
• Res tore interrupt