User Manual

i
T89C51AC2
Rev. B – 19-Dec-01
Table of Contents
1. Features ......................................................................................................... 1
2. Description ...................................................................................................... 1
3. Block Diagram ................................................................................................. 2
4. Pin Configurati on ............................................................................................. 3
4.1 I/O Configurations ..................................................................................... 6
4.2 Port 1, Port 3 and Port 4 ............................................................................ 6
4.3 Port 0 and Port2 ........................................................................................ 7
4.4 Read-M odify-Write Instructions ................................................................. 8
4.5 Quas i-Bidirectional Port Operation ............................................................ 9
5. SFR M apping .................................................................................................. 10
6. Clock ............................................................................................................... 15
6.1 Description ................................................................................................ 15
6.2 Register ..................................................................................................... 17
7. Data Memory ................................................................................................... 19
7.1 Internal Space ............................................................................................ 20
7.2 External Space .......................................................................................... 21
7.3 Dual Da ta Pointer ...................................................................................... 23
7.4 Registers ................................................................................................... 24
8. EEPROM Data Memory .................................................................................. 26
8.1 Write Data in the column latches ............................................................... 26
8.2 Programming ............................................................................................. 26
8.3 Read Data ................................................................................................. 26
8.4 Examples ................................................................................................... 27
8.5 Registers ................................................................................................... 28
9. Progra m/Code M emory ................................................................................... 29
9.1 External Code Memory Access ................................................................. 29
9.2 FLASH M emory Architecture ..................................................................... 31
9.3 Overview of FM0 operations ..................................................................... 33
9.4 Registers ................................................................................................... 39
10. In-System-Programmi ng (ISP) ...................................................................... 40
10.1 Flash Progra mming and Erasure ............................................................ 40
10.2 Boot Process ............................................................................................ 41
10.3 Application-Pro gramming-Interface ......................................................... 42
10.4 XROW Bytes ............................................................................................ 43
10.5 Hardware Security Byte ........................................................................... 44
11. Serial I/O Port ................................................................................................ 45
11.1 Framing Error Detection ......................................................................... 45
11.2 Automatic Add re ss Recognition .............................................................. 46
11.3 Given Address ........................................................................................ 46
11.4 Broadcast Address ................................................................................. 47
11.5 Registers .................................................................................................. 48
12. Timers/Counters ............................................................................................ 51
12.1 Timer/Count er Operations ....................................................................... 51
12.2 Timer 0 .................................................................................................... 51
12.3 Timer 1 .................................................................................................... 53
12.4 Interrupt ................................................................................................... 54
12.5 Registers ................................................................................................. 55
13. Timer 2 .......................................................................................................... 59
13.1 Auto-Reload Mode ................................................................................. 59
13.2 Pro grammable C lock-O utput .................................................................. 60
13.3 Registers ................................................................................................. 62
14. WatchDog Timer ............................................................................................ 65