Owner's manual

A/T8xC5121

4164G–SCR–07/06

Reset Value = 0000 0000b

Table 56. TMOD Register

TMOD (S:89h) - Timer 0/Counter Mode Control Registers

76543210

GATE1 C/T1# M11 M01 GATE0 C/T0# M10 M00

Bit Number Bit Mnemonic Description

7GATE1

Timer 1 Gating Control bit

Clear to enable Timer 1 whenever TR1 bit is set.

Set to enable Timer 1 only while INT

1 pin is high and TR1 bit is set.

6C/T1#

Timer 1 Counter/Timer 0 Select bit

Clear for Timer 0 operation: Timer 1 counts the divided-down system clock.

Set for Counter operation: Timer 1 counts negative transitions on external pin T1.

5M11

Timer 1 Mode Select bits

M11 M01 Operating mode

0 0 Mode 0:8-bit Timer 0/Counter (TH1) with 5-bit prescaler (TL1).

0 1 Mode 1:16-bit Timer 0/Counter.

1 0 Mode 2:8-bit auto-reload Timer 0/Counter (TL1). Reloaded from TH1 at overflow.

1 1 Mode 3:Timer 1 halted. Retains count.

4M01

3GATE0

Timer 0 Gating Control bit

Clear to enable Timer 0 whenever TR0 bit is set.

Set to enable Timer 0/Counter 0 only while INT

0 pin is high and TR0 bit is set.

2C/T0#

Timer 0 Counter/Timer 0 Select bit

Clear for Timer 0 operation: Timer 0 counts the divided-down system clock.

Set for Counter operation: Timer 0 counts negative transitions on external pin T0.

1M10

Timer 0 Mode Select bit

M10 M00 Operating mode

0 0 Mode 0:8-bit Timer 0/Counter (TH0) with 5-bit prescaler (TL0).

0 1 Mode 1:16-bit Timer 0/Counter

1 0 Mode 2:8-bit auto-reload Timer 0/Counter (TL0). Reloaded from TH0 at overflow.

1 1 Mode 3:TL0 is an 8-bit Timer 0/Counter.

TH0 is an 8-bit Timer 0 using Timer 1’s TR0 and TF0 bits.

0M00