Owner's manual

19
A/T8xC5121
4164G–SCR–07/06
Table 4. AUXR Register
AUXR (S:8Eh)
Auxiliary Register
Reset Value = 00XX XX00b
76543210
- LP - - - - EXTRAM AO
Bit
Number
Bit
Mnemonic Description
7-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
6LP
Low Power mode selection
Clear to select standard mode
Set to select low consumption mode
5-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
4-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
3-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
2-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
1EXTRAM
EXTRAM select
(ONLY for PLCC52 version)
Clear to map XRAM datas in internal XRAM memory.
Set to map XRAM datas in external XRAM memory.
0AO
ALE Output bit
(ONLY for PLCC52 version)
Clear to restore ALE operation during internal fetches.
Set to disable ALE operation during internal fetches.