Owner's manual
102
A/T8xC5121
4164G–SCR–07/06
Table 78. Smart Card Clock DC Parameters (Port P1.4)
Note: 1. The voltage on CLK should remain between -0.3V and CV
CC
+ 0.3V during dynamic
operation.
Table 79. Alternate Card Clock DC parameters (Port P3.6): 5V tolerant
Note: 1. The voltage on CLK should remain between -0.3V and V
CC
+ 0.3V during dynamic
operation.
Symbol Parameter Min Typ Max Unit Test Conditions
V
OL
Output Low
Voltage
0(1)
0(1)
0.2 x CV
CC
0.4
VI
OL
= 20 μΑ (1.8,3 V)
I
OL
= 50 μA (5V)
I
OL
Output Low
Current
15 mA
V
OH
Output High
Voltage
0.7 x CV
CC
0.7 x CV
CC
CV
CC
- 0.5
CV
CC
CV
CC
CV
CC
V
V
V
I
OH
= 20 μA (1.8V)
I
OH
= 20 μA (3V)
I
OH
= 50 μA (5V)
I
OH
Output High
Current
15 mA
t
R
t
F
Rise and Fall time
16
22.5
50
ns
C
IN
= 30 pF(5V)
C
IN
= 30 pF(3V)
C
IN
= 30 pF(1.8V)
Voltage Stability
-0.25
CV
CC
-0.5
0.4 x CV
CC
CV
CC
+
0.25
VLow level
High level
Symbol Parameter Min Typ Max Unit Test Conditions
V
OL
Output Low
Voltage
0 (1)
0(1)
0.2 x DV
CC
0.5
VI
OL
= 20 μA
I
OL
= -200 μA
V
OH
Output High
Voltage
0.7 x DV
CC
DV
CC
(1) V I
OH
= 20 μA
t
R
t
F
Rise and Fall
times
18 ns C
IN
= 30 pF