Owner manual
Table Of Contents
- Features
- Description
- Pin Configuration
- Pin Description: RF Part
- Pin Description: Microcontroller Part
- UHF ASK/FSK Transmitter Block
- Features
- Description
- General Description
- Functional Description
- Absolute Maximum Ratings
- Thermal Resistance
- Electrical Characteristics
- Microcontroller Block
- Features
- Description
- Introduction
- Microcontroller Architecture General Description
- Components of Microcontroller Core
- Master Reset
- Voltage Monitor
- Clock Generation
- Power-down Modes
- Peripheral Modules
- Bi-directional Ports
- Timer 3
- Features
- Timer/Counter Modes
- Timer 3 – Mode 1: Timer/Counter
- Timer 3 – Mode 2: Timer/Counter, External Trigger Restart and External Capture (with T3I Input)
- Timer 3 – Mode 3: Timer/Counter, Internal Trigger Restart and Internal Capture (with TOG2)
- Timer 3 – Mode 4: Timer/Counter
- Timer 3 – Mode 5: Timer/Counter, External Trigger Restart and External Capture (with T3I Input)
- Timer 3 Modulator/Demodulator Modes
- Timer 3 – Mode 6: Carrier Frequency Burst Modulation Controlled by Timer 2 Output Toggle FlipFlo...
- Timer 3 – Mode 7: Carrier Frequency Burst Modulation Controlled by SSI Internal Output (SO)
- Timer 3 – Mode 8: FSK Modulation with Shift Register Data (SO)
- Timer 3 – Mode 9: Pulse-width Modulation with the Shift Register
- Timer 3 – Mode 10: Manchester Demodulation/Pulse-width Demodulation
- Timer 3 – Mode 11: Biphase Demodulation
- Timer 3 – Mode 12: Timer/Counter with External Capture Mode (T3I)
- Timer 3 Modulator for Carrier Frequency Burst Modulation
- Timer 3 Demodulator for Biphase, Manchester and Pulse-width-modulated Signals
- Timer 3 Registers
- Timer 3 Mode Register (T3M)
- Timer 3 Control Register 1 (T3C) Write
- Timer 3 Status Register 1 (T3ST) Read
- Timer 3 Clock Select Register (T3CS)
- Timer 3 Compare- and Compare-mode Register
- Timer 3 Compare-Mode Register 1 (T3CM1)
- Timer 3 Compare Mode Register 2 (T3CM2)
- Timer 3 COmpare Register 1 (T3CO1) Byte Write
- Timer 3 COmpare Register 2 (T3CO2) Byte Write
- Timer 3 Capture Register
- Synchronous Serial Interface (SSI)
- Serial Interface Registers
- Combination Modes
- Absolute Maximum Ratings
- Thermal Resistance
- DC Operating Characteristics
- AC Characteristics
- Crystal Characteristics
- Ordering Information
- Package Information
- Table of Contents
82
T48C862-R8
4590B–4BMCU–02/03
Combination Mode Timer 3 and SSI
Figure 78. Combination Timer 3 and SSI
Combination Mode 6:
FSK Modulation
SSI mode 1: 8-bit shift register internal data output (SO) to the Timer 3
Timer 3 mode 8: FSK modulation with shift register data (SO)
The two compare registers are used to generate two varied time intervals. The SSI data
output selects which compare register is used for the output frequency generation. A "0"
level at the SSI data output enables the compare register 1 and a "1" level enables the
compare register 2. The compare and compare mode registers must be programmed to
generate the two frequencies via the output toggle flip-lop. The SSI can be supplied with
the toggle signal of Timer 2 or any other clock source. The Timer 3 counter is driven by
an internal or external clock source.
8-bit counter 3
RES
Compare 3/1
T3CO1
T3CP
T3CO2
Timer 3 - control
T3O
CL3
T3I
T3EX
SYSCL
T1OUT
POUT
I/O-bus
Compare 3/2
T3CM1 T3CM2
T3C T3ST
Modulator 3
Demodu-
lator 3
M2
Control
SO
TOG3
INT5
RES
CM31
T3I
T3EX
SI
SC
T3MT3CS
CP3
8-bit shift register
MSB LSB
Shift_CL
SO
SIC1 SIC2
SISC
SCLI
Control
STB SRB
SI
Output
INT3
I/O-bus
SSI-control
TOG2
POUT
T1OUT
SYSCL
SI
MCL_SC
MCL_SD
Transmit buffer Receive buffer
SC
SC
SI