Owner manual
Table Of Contents
- Features
- Description
- Pin Configuration
- Pin Description: RF Part
- Pin Description: Microcontroller Part
- UHF ASK/FSK Transmitter Block
- Features
- Description
- General Description
- Functional Description
- Absolute Maximum Ratings
- Thermal Resistance
- Electrical Characteristics
- Microcontroller Block
- Features
- Description
- Introduction
- Microcontroller Architecture General Description
- Components of Microcontroller Core
- Master Reset
- Voltage Monitor
- Clock Generation
- Power-down Modes
- Peripheral Modules
- Bi-directional Ports
- Timer 3
- Features
- Timer/Counter Modes
- Timer 3 – Mode 1: Timer/Counter
- Timer 3 – Mode 2: Timer/Counter, External Trigger Restart and External Capture (with T3I Input)
- Timer 3 – Mode 3: Timer/Counter, Internal Trigger Restart and Internal Capture (with TOG2)
- Timer 3 – Mode 4: Timer/Counter
- Timer 3 – Mode 5: Timer/Counter, External Trigger Restart and External Capture (with T3I Input)
- Timer 3 Modulator/Demodulator Modes
- Timer 3 – Mode 6: Carrier Frequency Burst Modulation Controlled by Timer 2 Output Toggle FlipFlo...
- Timer 3 – Mode 7: Carrier Frequency Burst Modulation Controlled by SSI Internal Output (SO)
- Timer 3 – Mode 8: FSK Modulation with Shift Register Data (SO)
- Timer 3 – Mode 9: Pulse-width Modulation with the Shift Register
- Timer 3 – Mode 10: Manchester Demodulation/Pulse-width Demodulation
- Timer 3 – Mode 11: Biphase Demodulation
- Timer 3 – Mode 12: Timer/Counter with External Capture Mode (T3I)
- Timer 3 Modulator for Carrier Frequency Burst Modulation
- Timer 3 Demodulator for Biphase, Manchester and Pulse-width-modulated Signals
- Timer 3 Registers
- Timer 3 Mode Register (T3M)
- Timer 3 Control Register 1 (T3C) Write
- Timer 3 Status Register 1 (T3ST) Read
- Timer 3 Clock Select Register (T3CS)
- Timer 3 Compare- and Compare-mode Register
- Timer 3 Compare-Mode Register 1 (T3CM1)
- Timer 3 Compare Mode Register 2 (T3CM2)
- Timer 3 COmpare Register 1 (T3CO1) Byte Write
- Timer 3 COmpare Register 2 (T3CO2) Byte Write
- Timer 3 Capture Register
- Synchronous Serial Interface (SSI)
- Serial Interface Registers
- Combination Modes
- Absolute Maximum Ratings
- Thermal Resistance
- DC Operating Characteristics
- AC Characteristics
- Crystal Characteristics
- Ordering Information
- Package Information
- Table of Contents

61
T48C862-R8
4590B–4BMCU–02/03
Timer 3 – Mode 12:
Timer/Counter with External
Capture Mode (T3I)
The counter is driven by an internal clock source and an edge at the external input T3I
loads the counter value into the capture register. The edge can be selected with the pro-
grammable edge detector of the timer input stage. This mode can be used for signal and
pulse measurements.
Figure 60. External Capture Mode
Timer 3 Modulator for
Carrier Frequency Burst
Modulation
If the output stage operates as pulse-width modulator for the shift register, the output
can be stopped with stage 1 of Timer 2. For this task, the timer mode 3 must be used
and the prescaler must be supplied by the internal shift clock of the shift register.
The modulator can be started with the start of the shift register (SIR = 0) and stopped
either by a shift register stop (SIR = 1) or compare match event of stage 1 of Timer 2.
For this task, the Timer 2 must be used in mode 3 and the prescaler stage must be sup-
plied by the internal shift clock of the shift register.
Figure 61. Modulator 3
Timer 3 Demodulator for
Biphase, Manchester and
Pulse-width-modulated
Signals
The demodulator stage of Timer 3 can be used to decode Biphase, Manchester and
pulse-width-coded signals.
Figure 62. Timer 3 Demodulator 3
01234567891011
Counter 3
T3CP-
Register
15
T3I
T3R
Capture value = X
Capture value = 17
Capture
value = 35
0 121314 16 20171819 2221 23 27242526 2928 30 34313233 3635 37 41383940
T3
Set
Res
T3O
T3TOP
OMSK
TOG3
SO
SSI/
Control
M2
M3
MUX
T3M
0
1
2
3
Timer 3 Mode T3O
6 MUX 1
7 MUX 2
9 MUX 3
other MUX 0
Demodulator 3
T3EX
Res
CM31
Counter 3
Reset
Counter 3
Control
SCI
SI
T3I
T3M










