Owner manual
Table Of Contents
- Features
- Description
- Pin Configuration
- Pin Description: RF Part
- Pin Description: Microcontroller Part
- UHF ASK/FSK Transmitter Block
- Features
- Description
- General Description
- Functional Description
- Absolute Maximum Ratings
- Thermal Resistance
- Electrical Characteristics
- Microcontroller Block
- Features
- Description
- Introduction
- Microcontroller Architecture General Description
- Components of Microcontroller Core
- Master Reset
- Voltage Monitor
- Clock Generation
- Power-down Modes
- Peripheral Modules
- Bi-directional Ports
- Timer 3
- Features
- Timer/Counter Modes
- Timer 3 – Mode 1: Timer/Counter
- Timer 3 – Mode 2: Timer/Counter, External Trigger Restart and External Capture (with T3I Input)
- Timer 3 – Mode 3: Timer/Counter, Internal Trigger Restart and Internal Capture (with TOG2)
- Timer 3 – Mode 4: Timer/Counter
- Timer 3 – Mode 5: Timer/Counter, External Trigger Restart and External Capture (with T3I Input)
- Timer 3 Modulator/Demodulator Modes
- Timer 3 – Mode 6: Carrier Frequency Burst Modulation Controlled by Timer 2 Output Toggle FlipFlo...
- Timer 3 – Mode 7: Carrier Frequency Burst Modulation Controlled by SSI Internal Output (SO)
- Timer 3 – Mode 8: FSK Modulation with Shift Register Data (SO)
- Timer 3 – Mode 9: Pulse-width Modulation with the Shift Register
- Timer 3 – Mode 10: Manchester Demodulation/Pulse-width Demodulation
- Timer 3 – Mode 11: Biphase Demodulation
- Timer 3 – Mode 12: Timer/Counter with External Capture Mode (T3I)
- Timer 3 Modulator for Carrier Frequency Burst Modulation
- Timer 3 Demodulator for Biphase, Manchester and Pulse-width-modulated Signals
- Timer 3 Registers
- Timer 3 Mode Register (T3M)
- Timer 3 Control Register 1 (T3C) Write
- Timer 3 Status Register 1 (T3ST) Read
- Timer 3 Clock Select Register (T3CS)
- Timer 3 Compare- and Compare-mode Register
- Timer 3 Compare-Mode Register 1 (T3CM1)
- Timer 3 Compare Mode Register 2 (T3CM2)
- Timer 3 COmpare Register 1 (T3CO1) Byte Write
- Timer 3 COmpare Register 2 (T3CO2) Byte Write
- Timer 3 Capture Register
- Synchronous Serial Interface (SSI)
- Serial Interface Registers
- Combination Modes
- Absolute Maximum Ratings
- Thermal Resistance
- DC Operating Characteristics
- AC Characteristics
- Crystal Characteristics
- Ordering Information
- Package Information
- Table of Contents
58
T48C862-R8
4590B–4BMCU–02/03
Figure 54. Externally Triggered Counter Reset and Start Combined with Single-action
Mode
Timer 3 – Mode 3:
Timer/Counter, Internal
Trigger Restart and Internal
Capture (with TOG2)
The counter is driven by an internal or external (T3I) clock source. The output toggle sig-
nal of Timer 2 resets the counter. The counter value before the reset is saved in the
capture register. If single-action mode is activated for one or both compare registers, the
trigger signal restarts the single actions. This mode can be used for frequency measure-
ments or as event counter with time gate (see combination mode 10).
Figure 55. Event Counter with Time Gate
Timer 3 – Mode 4:
Timer/Counter
The timer runs as timer/counter in mode 1, but its output T3O is used as output for the
Timer 2 output signal.
Timer 3 – Mode 5:
Timer/Counter, External
Trigger Restart and External
Capture (with T3I Input)
The Timer 3 runs as timer/counter in mode 2, but its output T3O is used as output for the
Timer 2 output signal.
Timer 3 Modulator/Demodulator Modes
Timer 3 – Mode 6:
Carrier Frequency Burst
Modulation Controlled by
Timer 2 Output Toggle
Flip-Flop (M2)
The Timer 3 counter is driven by an internal or external clock source. Its compare- and
compare mode registers must be programmed to generate the carrier frequency via the
output toggle flip-flop. The output toggle flip-flop of Timer 2 is used to enable or disable
the Timer 3 output. Timer 2 can be driven by the toggle output signal of Timer 3 or any
other clock source (see combination mode 11).
Timer 3 – Mode 7:
Carrier Frequency Burst
Modulation Controlled by SSI
Internal Output (SO)
The Timer 3 counter is driven by an internal or external clock source. Its compare- and
compare mode registers must be programmed to generate the carrier frequency via the
output toggle flip-flop. The output (SO) of the SSI is used to enable or disable the Timer
3 output. The SSI should be supplied with the toggle signal of Timer 2 (see combination
mode 12).
00000000123456
Counter 3
T3EX
CM31
CM32
78910012XXX012345678910012XX
T3R
XX
T3O
0012345678910
Counter 3
TOG2
T3CP-
Register
11 0 1 2 401
T3I
2
3
T3R
Capture value = 0 Capture value = 11
Capture
value = 4