Owner manual
Table Of Contents
- Features
- Description
- Pin Configuration
- Pin Description: RF Part
- Pin Description: Microcontroller Part
- UHF ASK/FSK Transmitter Block
- Features
- Description
- General Description
- Functional Description
- Absolute Maximum Ratings
- Thermal Resistance
- Electrical Characteristics
- Microcontroller Block
- Features
- Description
- Introduction
- Microcontroller Architecture General Description
- Components of Microcontroller Core
- Master Reset
- Voltage Monitor
- Clock Generation
- Power-down Modes
- Peripheral Modules
- Bi-directional Ports
- Timer 3
- Features
- Timer/Counter Modes
- Timer 3 – Mode 1: Timer/Counter
- Timer 3 – Mode 2: Timer/Counter, External Trigger Restart and External Capture (with T3I Input)
- Timer 3 – Mode 3: Timer/Counter, Internal Trigger Restart and Internal Capture (with TOG2)
- Timer 3 – Mode 4: Timer/Counter
- Timer 3 – Mode 5: Timer/Counter, External Trigger Restart and External Capture (with T3I Input)
- Timer 3 Modulator/Demodulator Modes
- Timer 3 – Mode 6: Carrier Frequency Burst Modulation Controlled by Timer 2 Output Toggle FlipFlo...
- Timer 3 – Mode 7: Carrier Frequency Burst Modulation Controlled by SSI Internal Output (SO)
- Timer 3 – Mode 8: FSK Modulation with Shift Register Data (SO)
- Timer 3 – Mode 9: Pulse-width Modulation with the Shift Register
- Timer 3 – Mode 10: Manchester Demodulation/Pulse-width Demodulation
- Timer 3 – Mode 11: Biphase Demodulation
- Timer 3 – Mode 12: Timer/Counter with External Capture Mode (T3I)
- Timer 3 Modulator for Carrier Frequency Burst Modulation
- Timer 3 Demodulator for Biphase, Manchester and Pulse-width-modulated Signals
- Timer 3 Registers
- Timer 3 Mode Register (T3M)
- Timer 3 Control Register 1 (T3C) Write
- Timer 3 Status Register 1 (T3ST) Read
- Timer 3 Clock Select Register (T3CS)
- Timer 3 Compare- and Compare-mode Register
- Timer 3 Compare-Mode Register 1 (T3CM1)
- Timer 3 Compare Mode Register 2 (T3CM2)
- Timer 3 COmpare Register 1 (T3CO1) Byte Write
- Timer 3 COmpare Register 2 (T3CO2) Byte Write
- Timer 3 Capture Register
- Synchronous Serial Interface (SSI)
- Serial Interface Registers
- Combination Modes
- Absolute Maximum Ratings
- Thermal Resistance
- DC Operating Characteristics
- AC Characteristics
- Crystal Characteristics
- Ordering Information
- Package Information
- Table of Contents

50
T48C862-R8
4590B–4BMCU–02/03
PWM Mode: Pulse-width modulation output on Timer 2 output pin (T2O)
Figure 47. PWM Modulation
Timer 2 Registers Timer 2 has 6 control registers to configure the timer mode, the time interval, the input
clock and its output function. All registers are indirectly addressed using extended
addressing as described in section "Addressing Peripherals". The alternate functions of
the Ports BP41 or BP42 must be selected with the Port 4 control register P4CR, if one of
the Timer 2 modes require an input at T2I/BP41 or an output at T2O/BP42.
Timer 2 Control Register (T2C) Address: "7"hex - Subaddress: "0"hex
0 0 50 255 1000 255 0 150 255 0 50 255 0 100
T2R
Input clock
Counter 2/2
Counter 2/2
OVF2
CM2
INT4
T2O
load the next
compare value
T2CO2=150 load load
T1 T2 T3 T1 T2
TTT T
T
Bit 3Bit 2Bit 1Bit 0
T2CS1 T2CS0 T2TS T2R Reset value: 0000b
T2CS1 Timer 2 Clock Select bit 1
T2CS0 Timer 2 Clock Select bit 0
T2CS1 T2CS0 Input Clock (CL 2/1) of Counter Stage 2/1
0 0 System clock (SYSCL)
0 1 Output signal of Timer 1 (T1OUT)
1 0 Internal shift clock of SSI (SCL)
1 1 Output signal of Timer 3 (TOG3)
T2TS Timer 2 Toggle with Start
T2TS = 0, the output flip-flop of Timer 2 is not toggled with the timer start
T2TS = 1, the output flip-flop of Timer 2 is toggled when the timer is started with
T2R
T2R Timer 2 Run
T2R = 0, Timer 2 stop and reset
T2R = 1, Timer 2 run










